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588 lines
18 KiB
588 lines
18 KiB
/*
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* include/haproxy/atomic.h
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* Macros and inline functions for thread-safe atomic operations.
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*
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* Copyright (C) 2017 Christopher Faulet - cfaulet@haproxy.com
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* Copyright (C) 2020 Willy Tarreau - w@1wt.eu
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation, version 2.1
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* exclusively.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef _HAPROXY_ATOMIC_H
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#define _HAPROXY_ATOMIC_H
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#include <string.h>
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/* A few notes for the macros and functions here:
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* - this file is painful to edit, most operations exist in 3 variants,
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* no-thread, threads with gcc<4.7, threads with gcc>=4.7. Be careful when
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* modifying it not to break any of them.
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*
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* - macros named HA_ATOMIC_* are or use in the general case, they contain the
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* required memory barriers to guarantee sequential consistency
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*
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* - macros named _HA_ATOMIC_* are the same but without the memory barriers,
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* so they may only be used if followed by other HA_ATOMIC_* or within a
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* sequence of _HA_ATOMIC_* terminated by a store barrier, or when there is
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* no data dependency (e.g. updating a counter). Not all of them are
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* implemented, in which case fallbacks to the safe ones are provided. In
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* case of doubt, don't use them and use the generic ones instead.
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*
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* - the __ha_atomic_* barriers are for use around _HA_ATOMIC_* operations.
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* Some architectures make them useless and they will automatically be
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* dropped in such a case. Don't use them outside of this use case.
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*
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* - in general, the more underscores you find in front of a function or macro
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* name, the riskier it is to use. Barriers are among them because validating
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* their usage is not trivial at all and it's often safer to fall back to
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* more generic behaviors.
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*
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* There is also a compiler barrier (__ha_compiler_barrier) which is eliminated
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* when threads are disabled. We currently don't have a permanent compiler
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* barrier to prevent the compiler from reordering signal-sensitive code for
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* example.
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*/
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#ifndef USE_THREAD
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/* Threads are DISABLED, atomic ops are also not used. Note that these MUST
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* NOT be used for inter-process synchronization nor signal-safe variable
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* manipulations which might occur without threads, as they are not atomic.
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*/
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#define HA_ATOMIC_LOAD(val) *(val)
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#define HA_ATOMIC_STORE(val, new) ({*(val) = new;})
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#define HA_ATOMIC_XCHG(val, new) \
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({ \
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typeof(*(val)) __old_xchg = *(val); \
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*(val) = new; \
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__old_xchg; \
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})
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#define HA_ATOMIC_AND(val, flags) ({*(val) &= (flags);})
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#define HA_ATOMIC_OR(val, flags) ({*(val) |= (flags);})
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#define HA_ATOMIC_ADD(val, i) ({*(val) += (i);})
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#define HA_ATOMIC_SUB(val, i) ({*(val) -= (i);})
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#define HA_ATOMIC_XADD(val, i) \
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({ \
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typeof((val)) __p_xadd = (val); \
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typeof(*(val)) __old_xadd = *__p_xadd; \
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*__p_xadd += i; \
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__old_xadd; \
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})
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#define HA_ATOMIC_BTS(val, bit) \
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({ \
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typeof((val)) __p_bts = (val); \
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typeof(*__p_bts) __b_bts = (1UL << (bit)); \
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typeof(*__p_bts) __t_bts = *__p_bts & __b_bts; \
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if (!__t_bts) \
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*__p_bts |= __b_bts; \
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__t_bts; \
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})
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#define HA_ATOMIC_BTR(val, bit) \
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({ \
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typeof((val)) __p_btr = (val); \
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typeof(*__p_btr) __b_btr = (1UL << (bit)); \
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typeof(*__p_btr) __t_btr = *__p_btr & __b_btr; \
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if (__t_btr) \
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*__p_btr &= ~__b_btr; \
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__t_btr; \
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})
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#define HA_ATOMIC_CAS(val, old, new) \
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({ \
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typeof(val) _v = (val); \
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typeof(old) _o = (old); \
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(*_v == *_o) ? ((*_v = (new)), 1) : ((*_o = *_v), 0); \
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})
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/* warning, n is a pointer to the double value for dwcas */
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#define HA_ATOMIC_DWCAS(val, o, n) \
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({ \
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long *_v = (long*)(val); \
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long *_o = (long*)(o); \
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long *_n = (long*)(n); \
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long _v0 = _v[0], _v1 = _v[1]; \
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(_v0 == _o[0] && _v1 == _o[1]) ? \
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(_v[0] = _n[0], _v[1] = _n[1], 1) : \
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(_o[0] = _v0, _o[1] = _v1, 0); \
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})
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#define HA_ATOMIC_UPDATE_MAX(val, new) \
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({ \
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typeof(val) __val = (val); \
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typeof(*(val)) __new_max = (new); \
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\
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if (*__val < __new_max) \
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*__val = __new_max; \
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*__val; \
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})
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#define HA_ATOMIC_UPDATE_MIN(val, new) \
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({ \
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typeof(val) __val = (val); \
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typeof(*(val)) __new_min = (new); \
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\
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if (*__val > __new_min) \
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*__val = __new_min; \
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*__val; \
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})
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/* various barriers */
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#define __ha_barrier_atomic_load() do { } while (0)
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#define __ha_barrier_atomic_store() do { } while (0)
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#define __ha_barrier_atomic_full() do { } while (0)
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#define __ha_barrier_load() do { } while (0)
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#define __ha_barrier_store() do { } while (0)
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#define __ha_barrier_full() do { } while (0)
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#define __ha_compiler_barrier() do { } while (0)
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#else /* !USE_THREAD */
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/* Threads are ENABLED, all atomic ops are made thread-safe. By extension they
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* can also be used for inter-process synchronization but one must verify that
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* the code still builds with threads disabled.
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*/
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#if defined(__GNUC__) && (__GNUC__ < 4 || __GNUC__ == 4 && __GNUC_MINOR__ < 7) && !defined(__clang__)
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/* gcc < 4.7 */
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#define HA_ATOMIC_LOAD(val) \
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({ \
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typeof(*(val)) ret; \
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__sync_synchronize(); \
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ret = *(volatile typeof(val))val; \
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__sync_synchronize(); \
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ret; \
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})
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#define HA_ATOMIC_STORE(val, new) \
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({ \
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typeof((val)) __val_store = (val); \
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typeof(*(val)) __old_store; \
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typeof((new)) __new_store = (new); \
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do { __old_store = *__val_store; \
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} while (!__sync_bool_compare_and_swap(__val_store, __old_store, __new_store)); \
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})
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#define HA_ATOMIC_XCHG(val, new) \
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({ \
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typeof((val)) __val_xchg = (val); \
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typeof(*(val)) __old_xchg; \
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typeof((new)) __new_xchg = (new); \
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do { __old_xchg = *__val_xchg; \
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} while (!__sync_bool_compare_and_swap(__val_xchg, __old_xchg, __new_xchg)); \
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__old_xchg; \
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})
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#define HA_ATOMIC_AND(val, flags) __sync_and_and_fetch(val, flags)
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#define HA_ATOMIC_OR(val, flags) __sync_or_and_fetch(val, flags)
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#define HA_ATOMIC_ADD(val, i) __sync_add_and_fetch(val, i)
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#define HA_ATOMIC_SUB(val, i) __sync_sub_and_fetch(val, i)
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#define HA_ATOMIC_XADD(val, i) __sync_fetch_and_add(val, i)
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#define HA_ATOMIC_BTS(val, bit) \
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({ \
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typeof(*(val)) __b_bts = (1UL << (bit)); \
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__sync_fetch_and_or((val), __b_bts) & __b_bts; \
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})
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#define HA_ATOMIC_BTR(val, bit) \
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({ \
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typeof(*(val)) __b_btr = (1UL << (bit)); \
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__sync_fetch_and_and((val), ~__b_btr) & __b_btr; \
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})
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/* the CAS is a bit complicated. The older API doesn't support returning the
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* value and the swap's result at the same time. So here we take what looks
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* like the safest route, consisting in using the boolean version guaranteeing
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* that the operation was performed or not, and we snoop a previous value. If
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* the compare succeeds, we return. If it fails, we return the previous value,
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* but only if it differs from the expected one. If it's the same it's a race
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* thus we try again to avoid confusing a possibly sensitive caller.
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*/
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#define HA_ATOMIC_CAS(val, old, new) \
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({ \
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typeof((val)) __val_cas = (val); \
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typeof((old)) __oldp_cas = (old); \
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typeof(*(old)) __oldv_cas; \
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typeof((new)) __new_cas = (new); \
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int __ret_cas; \
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do { \
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__oldv_cas = *__val_cas; \
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__ret_cas = __sync_bool_compare_and_swap(__val_cas, *__oldp_cas, __new_cas); \
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} while (!__ret_cas && *__oldp_cas == __oldv_cas); \
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if (!__ret_cas) \
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*__oldp_cas = __oldv_cas; \
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__ret_cas; \
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})
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/* warning, n is a pointer to the double value for dwcas */
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#define HA_ATOMIC_DWCAS(val, o, n) __ha_cas_dw(val, o, n)
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#define HA_ATOMIC_UPDATE_MAX(val, new) \
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({ \
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typeof(val) __val = (val); \
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typeof(*(val)) __old_max = *__val; \
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typeof(*(val)) __new_max = (new); \
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\
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while (__old_max < __new_max && \
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!HA_ATOMIC_CAS(__val, &__old_max, __new_max)); \
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*__val; \
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})
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#define HA_ATOMIC_UPDATE_MIN(val, new) \
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({ \
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typeof(val) __val = (val); \
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typeof(*(val)) __old_min = *__val; \
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typeof(*(val)) __new_min = (new); \
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\
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while (__old_min > __new_min && \
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!HA_ATOMIC_CAS(__val, &__old_min, __new_min)); \
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*__val; \
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})
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#else /* gcc */
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/* gcc >= 4.7 or clang */
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#define HA_ATOMIC_STORE(val, new) __atomic_store_n(val, new, __ATOMIC_SEQ_CST)
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#define HA_ATOMIC_LOAD(val) __atomic_load_n(val, __ATOMIC_SEQ_CST)
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#define HA_ATOMIC_XCHG(val, new) __atomic_exchange_n(val, new, __ATOMIC_SEQ_CST)
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#define HA_ATOMIC_AND(val, flags) __atomic_and_fetch(val, flags, __ATOMIC_SEQ_CST)
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#define HA_ATOMIC_OR(val, flags) __atomic_or_fetch(val, flags, __ATOMIC_SEQ_CST)
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#define HA_ATOMIC_ADD(val, i) __atomic_add_fetch(val, i, __ATOMIC_SEQ_CST)
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#define HA_ATOMIC_SUB(val, i) __atomic_sub_fetch(val, i, __ATOMIC_SEQ_CST)
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#define HA_ATOMIC_XADD(val, i) __atomic_fetch_add(val, i, __ATOMIC_SEQ_CST)
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#define HA_ATOMIC_BTS(val, bit) \
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({ \
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typeof(*(val)) __b_bts = (1UL << (bit)); \
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__sync_fetch_and_or((val), __b_bts) & __b_bts; \
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})
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#define HA_ATOMIC_BTR(val, bit) \
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({ \
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typeof(*(val)) __b_btr = (1UL << (bit)); \
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__sync_fetch_and_and((val), ~__b_btr) & __b_btr; \
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})
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#define HA_ATOMIC_CAS(val, old, new) __atomic_compare_exchange_n(val, old, new, 0, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST)
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/* warning, n is a pointer to the double value for dwcas */
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#define HA_ATOMIC_DWCAS(val, o, n) __ha_cas_dw(val, o, n)
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#define HA_ATOMIC_UPDATE_MAX(val, new) \
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({ \
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typeof(val) __val = (val); \
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typeof(*(val)) __old_max = *__val; \
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typeof(*(val)) __new_max = (new); \
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\
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while (__old_max < __new_max && \
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!HA_ATOMIC_CAS(__val, &__old_max, __new_max)); \
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*__val; \
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})
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#define HA_ATOMIC_UPDATE_MIN(val, new) \
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({ \
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typeof(val) __val = (val); \
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typeof(*(val)) __old_min = *__val; \
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typeof(*(val)) __new_min = (new); \
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\
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while (__old_min > __new_min && \
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!HA_ATOMIC_CAS(__val, &__old_min, __new_min)); \
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*__val; \
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})
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/* Modern compilers provide variants that don't generate any memory barrier.
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* If you're unsure how to deal with barriers, just use the HA_ATOMIC_* version,
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* that will always generate correct code.
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* Usually it's fine to use those when updating data that have no dependency,
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* ie updating a counter. Otherwise a barrier is required.
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*/
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#define _HA_ATOMIC_LOAD(val) __atomic_load_n(val, __ATOMIC_RELAXED)
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#define _HA_ATOMIC_STORE(val, new) __atomic_store_n(val, new, __ATOMIC_RELAXED)
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#define _HA_ATOMIC_XCHG(val, new) __atomic_exchange_n(val, new, __ATOMIC_RELAXED)
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#define _HA_ATOMIC_AND(val, flags) __atomic_and_fetch(val, flags, __ATOMIC_RELAXED)
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#define _HA_ATOMIC_OR(val, flags) __atomic_or_fetch(val, flags, __ATOMIC_RELAXED)
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#define _HA_ATOMIC_ADD(val, i) __atomic_add_fetch(val, i, __ATOMIC_RELAXED)
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#define _HA_ATOMIC_SUB(val, i) __atomic_sub_fetch(val, i, __ATOMIC_RELAXED)
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#define _HA_ATOMIC_XADD(val, i) __atomic_fetch_add(val, i, __ATOMIC_RELAXED)
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#define _HA_ATOMIC_CAS(val, old, new) __atomic_compare_exchange_n(val, old, new, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED)
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/* warning, n is a pointer to the double value for dwcas */
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#define _HA_ATOMIC_DWCAS(val, o, n) __ha_cas_dw(val, o, n)
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#endif /* gcc >= 4.7 */
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/* Here come a few architecture-specific double-word CAS and barrier
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* implementations.
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*/
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#ifdef __x86_64__
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static __inline void
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__ha_barrier_load(void)
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{
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__asm __volatile("lfence" ::: "memory");
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}
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static __inline void
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__ha_barrier_store(void)
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{
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__asm __volatile("sfence" ::: "memory");
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}
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static __inline void
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__ha_barrier_full(void)
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{
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__asm __volatile("mfence" ::: "memory");
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}
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/* Use __ha_barrier_atomic* when you're trying to protect data that are
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* are modified using _HA_ATOMIC*
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*/
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static __inline void
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__ha_barrier_atomic_load(void)
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{
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__asm __volatile("" ::: "memory");
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}
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static __inline void
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__ha_barrier_atomic_store(void)
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{
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__asm __volatile("" ::: "memory");
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}
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static __inline void
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__ha_barrier_atomic_full(void)
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{
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__asm __volatile("" ::: "memory");
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}
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static __inline int
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__ha_cas_dw(void *target, void *compare, const void *set)
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{
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char ret;
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__asm __volatile("lock cmpxchg16b %0; setz %3"
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: "+m" (*(void **)target),
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"=a" (((void **)compare)[0]),
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"=d" (((void **)compare)[1]),
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"=q" (ret)
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: "a" (((void **)compare)[0]),
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"d" (((void **)compare)[1]),
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"b" (((const void **)set)[0]),
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"c" (((const void **)set)[1])
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: "memory", "cc");
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return (ret);
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}
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#elif defined(__arm__) && (defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__))
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static __inline void
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__ha_barrier_load(void)
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{
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__asm __volatile("dmb" ::: "memory");
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}
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static __inline void
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__ha_barrier_store(void)
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{
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__asm __volatile("dsb" ::: "memory");
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}
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static __inline void
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__ha_barrier_full(void)
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{
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__asm __volatile("dmb" ::: "memory");
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}
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/* Use __ha_barrier_atomic* when you're trying to protect data that are
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* are modified using _HA_ATOMIC*
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*/
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static __inline void
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__ha_barrier_atomic_load(void)
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{
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__asm __volatile("dmb" ::: "memory");
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}
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static __inline void
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__ha_barrier_atomic_store(void)
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{
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__asm __volatile("dsb" ::: "memory");
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}
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static __inline void
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__ha_barrier_atomic_full(void)
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{
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__asm __volatile("dmb" ::: "memory");
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}
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static __inline int __ha_cas_dw(void *target, void *compare, const void *set)
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{
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uint64_t previous;
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int tmp;
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__asm __volatile("1:"
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"ldrexd %0, [%4];"
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"cmp %Q0, %Q2;"
|
|
"ittt eq;"
|
|
"cmpeq %R0, %R2;"
|
|
"strexdeq %1, %3, [%4];"
|
|
"cmpeq %1, #1;"
|
|
"beq 1b;"
|
|
: "=&r" (previous), "=&r" (tmp)
|
|
: "r" (*(uint64_t *)compare), "r" (*(uint64_t *)set), "r" (target)
|
|
: "memory", "cc");
|
|
tmp = (previous == *(uint64_t *)compare);
|
|
*(uint64_t *)compare = previous;
|
|
return (tmp);
|
|
}
|
|
|
|
#elif defined (__aarch64__)
|
|
|
|
static __inline void
|
|
__ha_barrier_load(void)
|
|
{
|
|
__asm __volatile("dmb ishld" ::: "memory");
|
|
}
|
|
|
|
static __inline void
|
|
__ha_barrier_store(void)
|
|
{
|
|
__asm __volatile("dmb ishst" ::: "memory");
|
|
}
|
|
|
|
static __inline void
|
|
__ha_barrier_full(void)
|
|
{
|
|
__asm __volatile("dmb ish" ::: "memory");
|
|
}
|
|
|
|
/* Use __ha_barrier_atomic* when you're trying to protect data that are
|
|
* are modified using _HA_ATOMIC*
|
|
*/
|
|
static __inline void
|
|
__ha_barrier_atomic_load(void)
|
|
{
|
|
__asm __volatile("dmb ishld" ::: "memory");
|
|
}
|
|
|
|
static __inline void
|
|
__ha_barrier_atomic_store(void)
|
|
{
|
|
__asm __volatile("dmb ishst" ::: "memory");
|
|
}
|
|
|
|
static __inline void
|
|
__ha_barrier_atomic_full(void)
|
|
{
|
|
__asm __volatile("dmb ish" ::: "memory");
|
|
}
|
|
|
|
static __inline int __ha_cas_dw(void *target, void *compare, void *set)
|
|
{
|
|
void *value[2];
|
|
uint64_t tmp1, tmp2;
|
|
|
|
__asm__ __volatile__("1:"
|
|
"ldxp %0, %1, [%4]\n"
|
|
"mov %2, %0\n"
|
|
"mov %3, %1\n"
|
|
"eor %0, %0, %5\n"
|
|
"eor %1, %1, %6\n"
|
|
"orr %1, %0, %1\n"
|
|
"mov %w0, #0\n"
|
|
"cbnz %1, 2f\n"
|
|
"stxp %w0, %7, %8, [%4]\n"
|
|
"cbnz %w0, 1b\n"
|
|
"mov %w0, #1\n"
|
|
"2:"
|
|
: "=&r" (tmp1), "=&r" (tmp2), "=&r" (value[0]), "=&r" (value[1])
|
|
: "r" (target), "r" (((void **)(compare))[0]), "r" (((void **)(compare))[1]), "r" (((void **)(set))[0]), "r" (((void **)(set))[1])
|
|
: "cc", "memory");
|
|
|
|
memcpy(compare, &value, sizeof(value));
|
|
return (tmp1);
|
|
}
|
|
|
|
#else /* unknown / unhandled architecture, fall back to generic barriers */
|
|
|
|
#define __ha_barrier_atomic_load __sync_synchronize
|
|
#define __ha_barrier_atomic_store __sync_synchronize
|
|
#define __ha_barrier_atomic_full __sync_synchronize
|
|
#define __ha_barrier_load __sync_synchronize
|
|
#define __ha_barrier_store __sync_synchronize
|
|
#define __ha_barrier_full __sync_synchronize
|
|
/* Note: there is no generic DWCAS */
|
|
|
|
#endif /* end of arch-specific barrier/dwcas */
|
|
|
|
static inline void __ha_compiler_barrier(void)
|
|
{
|
|
__asm __volatile("" ::: "memory");
|
|
}
|
|
|
|
#endif /* USE_THREAD */
|
|
|
|
|
|
/* fallbacks to remap all undefined _HA_ATOMIC_* on to their safe equivalent */
|
|
#ifndef _HA_ATOMIC_CAS
|
|
#define _HA_ATOMIC_CAS HA_ATOMIC_CAS
|
|
#endif /* !_HA_ATOMIC_CAS */
|
|
|
|
#ifndef _HA_ATOMIC_DWCAS
|
|
#define _HA_ATOMIC_DWCAS HA_ATOMIC_DWCAS
|
|
#endif /* !_HA_ATOMIC_CAS */
|
|
|
|
#ifndef _HA_ATOMIC_ADD
|
|
#define _HA_ATOMIC_ADD HA_ATOMIC_ADD
|
|
#endif /* !_HA_ATOMIC_ADD */
|
|
|
|
#ifndef _HA_ATOMIC_XADD
|
|
#define _HA_ATOMIC_XADD HA_ATOMIC_XADD
|
|
#endif /* !_HA_ATOMIC_SUB */
|
|
|
|
#ifndef _HA_ATOMIC_SUB
|
|
#define _HA_ATOMIC_SUB HA_ATOMIC_SUB
|
|
#endif /* !_HA_ATOMIC_SUB */
|
|
|
|
#ifndef _HA_ATOMIC_AND
|
|
#define _HA_ATOMIC_AND HA_ATOMIC_AND
|
|
#endif /* !_HA_ATOMIC_AND */
|
|
|
|
#ifndef _HA_ATOMIC_OR
|
|
#define _HA_ATOMIC_OR HA_ATOMIC_OR
|
|
#endif /* !_HA_ATOMIC_OR */
|
|
|
|
#ifndef _HA_ATOMIC_XCHG
|
|
#define _HA_ATOMIC_XCHG HA_ATOMIC_XCHG
|
|
#endif /* !_HA_ATOMIC_XCHG */
|
|
|
|
#ifndef _HA_ATOMIC_STORE
|
|
#define _HA_ATOMIC_STORE HA_ATOMIC_STORE
|
|
#endif /* !_HA_ATOMIC_STORE */
|
|
|
|
#ifndef _HA_ATOMIC_LOAD
|
|
#define _HA_ATOMIC_LOAD HA_ATOMIC_LOAD
|
|
#endif /* !_HA_ATOMIC_LOAD */
|
|
|
|
#endif /* _HAPROXY_ATOMIC_H */
|
|
|