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52 lines
1.7 KiB
52 lines
1.7 KiB
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-02-08 RT-Thread the first version
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*/
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#ifndef __MMU_H__
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#define __MMU_H__
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#include <rtthread.h>
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#define CACHE_LINE_SIZE 32
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#define DESC_SEC (0x2|(1<<4))
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#define CB (3<<2) //cache_on, write_back
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#define CNB (2<<2) //cache_on, write_through
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#define NCB (1<<2) //cache_off,WR_BUF on
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#define NCNB (0<<2) //cache_off,WR_BUF off
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#define AP_RW (3<<10) //supervisor=RW, user=RW
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#define AP_RO (2<<10) //supervisor=RW, user=RO
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#define DOMAIN_FAULT (0x0)
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#define DOMAIN_CHK (0x1)
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#define DOMAIN_NOTCHK (0x3)
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#define DOMAIN0 (0x0<<5)
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#define DOMAIN1 (0x1<<5)
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#define DOMAIN0_ATTR (DOMAIN_CHK<<0)
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#define DOMAIN1_ATTR (DOMAIN_FAULT<<2)
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#define RW_CB (AP_RW|DOMAIN0|CB|DESC_SEC) /* Read/Write, cache, write back */
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#define RW_CNB (AP_RW|DOMAIN0|CNB|DESC_SEC) /* Read/Write, cache, write through */
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#define RW_NCNB (AP_RW|DOMAIN0|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
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#define RW_FAULT (AP_RW|DOMAIN1|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
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struct mem_desc
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{
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rt_uint32_t vaddr_start;
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rt_uint32_t vaddr_end;
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rt_uint32_t paddr_start;
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rt_uint32_t attr;
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};
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void rt_hw_mmu_init(struct mem_desc *mdesc, rt_uint32_t size);
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void mmu_clean_invalidated_dcache(rt_uint32_t buffer, rt_uint32_t size);
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void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size);
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void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size);
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#endif
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