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57 lines
1.4 KiB
57 lines
1.4 KiB
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-12-14 supperthomas first version
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* 2022-03-16 Miaowulue add sram2
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include <rtthread.h>
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#include <stm32h7xx.h>
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#include "drv_common.h"
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#include "drv_gpio.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
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#define STM32_FLASH_SIZE (2048 * 1024)
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#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
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#define STM32_SRAM1_SIZE (128)
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#define STM32_SRAM1_START (0x20000000)
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#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
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#define STM32_SRAM2_SIZE (512)
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#define STM32_SRAM2_START (0x24000000)
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#define STM32_SRAM2_END (STM32_SRAM2_START + STM32_SRAM2_SIZE * 1024)
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="CSTACK"
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#define HEAP_BEGIN (__segment_end("CSTACK"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN ((void *)&__bss_end)
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#endif
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#define HEAP_END STM32_SRAM2_END
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void SystemClock_Config(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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