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373 lines
9.5 KiB
373 lines
9.5 KiB
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-04-16 bigmagic first version
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* 2020-05-26 bigmagic add other uart
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "drv_uart.h"
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#include "drv_gpio.h"
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#ifdef RT_USING_UART0
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static struct rt_serial_device _serial0;
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#endif
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#ifdef RT_USING_UART1
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static struct rt_serial_device _serial1;
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#endif
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#ifdef RT_USING_UART3
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static struct rt_serial_device _serial3;
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#endif
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#ifdef RT_USING_UART4
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static struct rt_serial_device _serial4;
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#endif
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#ifdef RT_USING_UART5
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static struct rt_serial_device _serial5;
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#endif
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struct hw_uart_device
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{
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rt_ubase_t hw_base;
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rt_uint32_t irqno;
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};
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static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct hw_uart_device *uart;
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uint32_t bauddiv = (UART_REFERENCE_CLOCK / cfg->baud_rate)* 1000 / 16;
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uint32_t ibrd = bauddiv / 1000;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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if(uart->hw_base == AUX_BASE)
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{
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prev_raspi_pin_mode(GPIO_PIN_14, ALT5);
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prev_raspi_pin_mode(GPIO_PIN_15, ALT5);
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AUX_ENABLES(uart->hw_base) = 1; /* Enable UART1 */
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AUX_MU_IER_REG(uart->hw_base) = 0; /* Disable interrupt */
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AUX_MU_CNTL_REG(uart->hw_base) = 0; /* Disable Transmitter and Receiver */
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AUX_MU_LCR_REG(uart->hw_base) = 3; /* Works in 8-bit mode */
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AUX_MU_MCR_REG(uart->hw_base) = 0; /* Disable RTS */
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AUX_MU_IIR_REG(uart->hw_base) = 0xC6; /* Enable FIFO, Clear FIFO */
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AUX_MU_BAUD_REG(uart->hw_base) = 541; /* 115200 = system clock 500MHz / (8 * (baud + 1)), baud = 541 */
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AUX_MU_CNTL_REG(uart->hw_base) = 3; /* Enable Transmitter and Receiver */
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return RT_EOK;
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}
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if(uart->hw_base == UART0_BASE)
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{
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#ifndef BSP_USING_BULETOOTH
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prev_raspi_pin_mode(GPIO_PIN_14, ALT0);
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prev_raspi_pin_mode(GPIO_PIN_15, ALT0);
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#else
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prev_raspi_pin_mode(GPIO_PIN_30, ALT3);
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prev_raspi_pin_mode(GPIO_PIN_31, ALT3);
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prev_raspi_pin_mode(GPIO_PIN_32, ALT3);
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prev_raspi_pin_mode(GPIO_PIN_33, ALT3);
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#endif
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}
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if(uart->hw_base == UART3_BASE)
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{
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prev_raspi_pin_mode(GPIO_PIN_4, ALT4);
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prev_raspi_pin_mode(GPIO_PIN_5, ALT4);
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}
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if(uart->hw_base == UART4_BASE)
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{
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prev_raspi_pin_mode(GPIO_PIN_8, ALT4);
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prev_raspi_pin_mode(GPIO_PIN_9, ALT4);
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}
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if(uart->hw_base == UART5_BASE)
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{
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prev_raspi_pin_mode(GPIO_PIN_12, ALT4);
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prev_raspi_pin_mode(GPIO_PIN_13, ALT4);
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}
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PL011_REG_IMSC(uart->hw_base) = 0; /* mask all interrupt */
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PL011_REG_ICR(uart->hw_base) = 0x7ff; /* clear all interrupt */
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//PL011 clock 480MHz 480x10^6/baudrate/16
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PL011_REG_IBRD(uart->hw_base) = ibrd;
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PL011_REG_FBRD(uart->hw_base) = (((bauddiv - ibrd * 1000) * 64 + 500) / 1000);
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#ifdef BSP_USING_BULETOOTH
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PL011_REG_IFLS(uart->hw_base) = 0x08;
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PL011_REG_LCRH(uart->hw_base) = 0x70;
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PL011_REG_CR(uart->hw_base) = PL011_CR_UARTEN | PL011_CR_TXE | PL011_CR_RXE | PL011_CR_RTS;
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#else
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PL011_REG_IFLS(uart->hw_base) = 0x0;
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PL011_REG_LCRH(uart->hw_base) = PL011_LCRH_WLEN_8;
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PL011_REG_CR(uart->hw_base) = PL011_CR_UARTEN | PL011_CR_TXE | PL011_CR_RXE;
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#endif
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PL011_REG_IMSC(uart->hw_base) = 0;
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return RT_EOK;
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}
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static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct hw_uart_device *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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if(uart->hw_base == AUX_BASE)
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{
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AUX_MU_IER_REG(uart->hw_base) = 0x0;
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}
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else
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{
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PL011_REG_IMSC(uart->hw_base) &= ~((uint32_t)PL011_IMSC_RXIM);
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}
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rt_hw_interrupt_mask(uart->irqno);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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if(uart->hw_base == AUX_BASE)
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{
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AUX_MU_IER_REG(uart->hw_base) = 0x1;
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}
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else
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{
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PL011_REG_IMSC(uart->hw_base) |= PL011_IMSC_RXIM;
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}
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rt_hw_interrupt_umask(uart->irqno);
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break;
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}
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return RT_EOK;
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}
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static int uart_putc(struct rt_serial_device *serial, char c)
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{
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struct hw_uart_device *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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if(uart->hw_base == AUX_BASE)
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{
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while (!(AUX_MU_LSR_REG(uart->hw_base) & 0x20));
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AUX_MU_IO_REG(uart->hw_base) = c;
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}
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else
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{
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while ((PL011_REG_FR(uart->hw_base) & PL011_FR_TXFF));
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PL011_REG_DR(uart->hw_base) = (uint8_t)c;
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}
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return 1;
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}
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static int uart_getc(struct rt_serial_device *serial)
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{
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int ch = -1;
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struct hw_uart_device *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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if(uart->hw_base == AUX_BASE)
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{
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if ((AUX_MU_LSR_REG(uart->hw_base) & 0x01))
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{
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ch = AUX_MU_IO_REG(uart->hw_base) & 0xff;
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}
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}
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else
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{
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if((PL011_REG_FR(uart->hw_base) & PL011_FR_RXFE) == 0)
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{
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ch = PL011_REG_DR(uart->hw_base) & 0xff;
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}
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}
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return ch;
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}
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static const struct rt_uart_ops _uart_ops =
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{
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uart_configure,
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uart_control,
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uart_putc,
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uart_getc,
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};
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#ifdef RT_USING_UART1
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static void rt_hw_aux_uart_isr(int irqno, void *param)
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{
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struct rt_serial_device *serial = (struct rt_serial_device*)param;
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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#endif
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static void rt_hw_uart_isr(int irqno, void *param)
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{
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#ifdef RT_USING_UART0
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if((PACTL_CS & IRQ_UART0) == IRQ_UART0)
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{
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PACTL_CS &= ~(IRQ_UART0);
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rt_hw_serial_isr(&_serial0, RT_SERIAL_EVENT_RX_IND);
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PL011_REG_ICR(UART0_BASE) = PL011_INTERRUPT_RECEIVE;
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}
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#endif
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#ifdef RT_USING_UART3
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if((PACTL_CS & IRQ_UART3) == IRQ_UART3)
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{
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PACTL_CS &= ~(IRQ_UART3);
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rt_hw_serial_isr(&_serial3, RT_SERIAL_EVENT_RX_IND);
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PL011_REG_ICR(UART3_BASE) = PL011_INTERRUPT_RECEIVE;
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}
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#endif
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#ifdef RT_USING_UART4
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if((PACTL_CS & IRQ_UART4) == IRQ_UART4)
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{
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PACTL_CS &= ~(IRQ_UART4);
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rt_hw_serial_isr(&_serial4, RT_SERIAL_EVENT_RX_IND);
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PL011_REG_ICR(UART4_BASE) = PL011_INTERRUPT_RECEIVE;
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}
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#endif
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#ifdef RT_USING_UART5
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if((PACTL_CS & IRQ_UART5) == IRQ_UART5)
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{
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PACTL_CS &= ~(IRQ_UART5);
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rt_hw_serial_isr(&_serial5, RT_SERIAL_EVENT_RX_IND);
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PL011_REG_ICR(UART5_BASE) = PL011_INTERRUPT_RECEIVE;
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}
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#endif
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}
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#ifdef RT_USING_UART0
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/* UART device driver structure */
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static struct hw_uart_device _uart0_device =
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{
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UART0_BASE,
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IRQ_PL011,
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};
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#endif
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#ifdef RT_USING_UART1
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/* UART device driver structure */
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static struct hw_uart_device _uart1_device =
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{
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AUX_BASE,
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IRQ_AUX_UART,
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};
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#endif
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#ifdef RT_USING_UART3
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static struct hw_uart_device _uart3_device =
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{
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UART3_BASE,
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IRQ_PL011,
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};
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#endif
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#ifdef RT_USING_UART4
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static struct hw_uart_device _uart4_device =
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{
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UART4_BASE,
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IRQ_PL011,
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};
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#endif
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#ifdef RT_USING_UART5
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static struct hw_uart_device _uart5_device =
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{
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UART5_BASE,
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IRQ_PL011,
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};
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#endif
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int rt_hw_uart_init(void)
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{
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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#ifdef RT_USING_UART0
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struct hw_uart_device *uart0;
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uart0 = &_uart0_device;
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_serial0.ops = &_uart_ops;
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_serial0.config = config;
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/* register UART0 device */
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rt_hw_serial_register(&_serial0, "uart0",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart0);
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rt_hw_interrupt_install(uart0->irqno, rt_hw_uart_isr, &_serial0, "uart0");
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#endif
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#ifdef RT_USING_UART1
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struct hw_uart_device *uart1;
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uart1 = &_uart1_device;
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_serial1.ops = &_uart_ops;
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_serial1.config = config;
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/* register UART1 device */
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rt_hw_serial_register(&_serial1, "uart1",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart1);
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rt_hw_interrupt_install(uart1->irqno, rt_hw_aux_uart_isr, &_serial1, "uart1");
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#endif
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#ifdef RT_USING_UART3
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struct hw_uart_device *uart3;
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uart3 = &_uart3_device;
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_serial3.ops = &_uart_ops;
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_serial3.config = config;
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/* register UART3 device */
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rt_hw_serial_register(&_serial3, "uart3",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart3);
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rt_hw_interrupt_install(uart3->irqno, rt_hw_uart_isr, &_serial3, "uart3");
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#endif
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#ifdef RT_USING_UART4
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struct hw_uart_device *uart4;
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uart4 = &_uart4_device;
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_serial4.ops = &_uart_ops;
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_serial4.config = config;
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/* register UART4 device */
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rt_hw_serial_register(&_serial4, "uart4",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart4);
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rt_hw_interrupt_install(uart4->irqno, rt_hw_uart_isr, &_serial4, "uart4");
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#endif
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#ifdef RT_USING_UART5
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struct hw_uart_device *uart5;
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uart5 = &_uart5_device;
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_serial5.ops = &_uart_ops;
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_serial5.config = config;
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/* register UART5 device */
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rt_hw_serial_register(&_serial5, "uart5",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart5);
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rt_hw_interrupt_install(uart5->irqno, rt_hw_uart_isr, &_serial5, "uart5");
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#endif
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return 0;
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}
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