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244 lines
8.1 KiB
244 lines
8.1 KiB
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-05-18 Bernard port from FreeBSD
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*/
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/*-
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* Copyright (c) 2016-2017 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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* Copyright (c) 2019 Mitchell Horne <mhorne@FreeBSD.org>
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*
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* Portions of this software were developed by SRI International and the
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* University of Cambridge Computer Laboratory under DARPA/AFRL contract
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* FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Portions of this software were developed by the University of Cambridge
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* Computer Laboratory as part of the CTSRD Project, with support from the
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* UK Higher Education Innovation Fund (HEIF).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_SBI_H_
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#define _MACHINE_SBI_H_
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#include <stdint.h>
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#include <rtdef.h>
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/* SBI Specification Version */
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#define SBI_SPEC_VERS_MAJOR_OFFSET 24
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#define SBI_SPEC_VERS_MAJOR_MASK (0x7F << SBI_SPEC_VERS_MAJOR_OFFSET)
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#define SBI_SPEC_VERS_MINOR_OFFSET 0
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#define SBI_SPEC_VERS_MINOR_MASK (0xFFFFFF << SBI_SPEC_VERS_MINOR_OFFSET)
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/* SBI Implementation IDs */
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#define SBI_IMPL_ID_BBL 0
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#define SBI_IMPL_ID_OPENSBI 1
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#define SBI_IMPL_ID_XVISOR 2
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#define SBI_IMPL_ID_KVM 3
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#define SBI_IMPL_ID_RUSTSBI 4
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#define SBI_IMPL_ID_DIOSIX 5
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/* SBI Error Codes */
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#define SBI_SUCCESS 0
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#define SBI_ERR_FAILURE -1
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#define SBI_ERR_NOT_SUPPORTED -2
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#define SBI_ERR_INVALID_PARAM -3
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#define SBI_ERR_DENIED -4
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#define SBI_ERR_INVALID_ADDRESS -5
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#define SBI_ERR_ALREADY_AVAILABLE -6
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/* SBI Base Extension */
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#define SBI_EXT_ID_BASE 0x10
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#define SBI_BASE_GET_SPEC_VERSION 0
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#define SBI_BASE_GET_IMPL_ID 1
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#define SBI_BASE_GET_IMPL_VERSION 2
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#define SBI_BASE_PROBE_EXTENSION 3
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#define SBI_BASE_GET_MVENDORID 4
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#define SBI_BASE_GET_MARCHID 5
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#define SBI_BASE_GET_MIMPID 6
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/* Timer (TIME) Extension */
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#define SBI_EXT_ID_TIME 0x54494D45
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#define SBI_TIME_SET_TIMER 0
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/* IPI (IPI) Extension */
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#define SBI_EXT_ID_IPI 0x735049
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#define SBI_IPI_SEND_IPI 0
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/* RFENCE (RFNC) Extension */
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#define SBI_EXT_ID_RFNC 0x52464E43
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#define SBI_RFNC_REMOTE_FENCE_I 0
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#define SBI_RFNC_REMOTE_SFENCE_VMA 1
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#define SBI_RFNC_REMOTE_SFENCE_VMA_ASID 2
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#define SBI_RFNC_REMOTE_HFENCE_GVMA_VMID 3
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#define SBI_RFNC_REMOTE_HFENCE_GVMA 4
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#define SBI_RFNC_REMOTE_HFENCE_VVMA_ASID 5
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#define SBI_RFNC_REMOTE_HFENCE_VVMA 6
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/* Hart State Management (HSM) Extension */
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#define SBI_EXT_ID_HSM 0x48534D
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#define SBI_HSM_HART_START 0
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#define SBI_HSM_HART_STOP 1
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#define SBI_HSM_HART_STATUS 2
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#define SBI_HSM_STATUS_STARTED 0
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#define SBI_HSM_STATUS_STOPPED 1
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#define SBI_HSM_STATUS_START_PENDING 2
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#define SBI_HSM_STATUS_STOP_PENDING 3
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/* Legacy Extensions */
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#define SBI_SET_TIMER 0
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#define SBI_CONSOLE_PUTCHAR 1
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#define SBI_CONSOLE_GETCHAR 2
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#define SBI_CLEAR_IPI 3
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#define SBI_SEND_IPI 4
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#define SBI_REMOTE_FENCE_I 5
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#define SBI_REMOTE_SFENCE_VMA 6
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#define SBI_REMOTE_SFENCE_VMA_ASID 7
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#define SBI_SHUTDOWN 8
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#define SBI_CALL0(e, f) SBI_CALL5(e, f, 0, 0, 0, 0, 0)
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#define SBI_CALL1(e, f, p1) SBI_CALL5(e, f, p1, 0, 0, 0, 0)
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#define SBI_CALL2(e, f, p1, p2) SBI_CALL5(e, f, p1, p2, 0, 0, 0)
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#define SBI_CALL3(e, f, p1, p2, p3) SBI_CALL5(e, f, p1, p2, p3, 0, 0)
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#define SBI_CALL4(e, f, p1, p2, p3, p4) SBI_CALL5(e, f, p1, p2, p3, p4, 0)
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#define SBI_CALL5(e, f, p1, p2, p3, p4, p5) sbi_call(e, f, p1, p2, p3, p4, p5)
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/*
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* Documentation available at
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* https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
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*/
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struct sbi_ret
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{
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long error;
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long value;
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};
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static __inline struct sbi_ret
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sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0, uint64_t arg1,
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uint64_t arg2, uint64_t arg3, uint64_t arg4)
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{
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struct sbi_ret ret;
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register uintptr_t a0 __asm("a0") = (uintptr_t)(arg0);
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register uintptr_t a1 __asm("a1") = (uintptr_t)(arg1);
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register uintptr_t a2 __asm("a2") = (uintptr_t)(arg2);
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register uintptr_t a3 __asm("a3") = (uintptr_t)(arg3);
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register uintptr_t a4 __asm("a4") = (uintptr_t)(arg4);
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register uintptr_t a6 __asm("a6") = (uintptr_t)(arg6);
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register uintptr_t a7 __asm("a7") = (uintptr_t)(arg7);
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__asm __volatile(\
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"ecall" \
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: "+r"(a0), "+r"(a1) \
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: "r"(a2), "r"(a3), "r"(a4), "r"(a6), "r"(a7) \
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: "memory");
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ret.error = a0;
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ret.value = a1;
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return (ret);
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}
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/* Base extension functions and variables. */
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extern unsigned long sbi_spec_version;
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extern unsigned long sbi_impl_id;
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extern unsigned long sbi_impl_version;
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static __inline long
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sbi_probe_extension(long id)
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{
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return (SBI_CALL1(SBI_EXT_ID_BASE, SBI_BASE_PROBE_EXTENSION, id).value);
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}
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/* TIME extension functions. */
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void sbi_set_timer(uint64_t val);
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/* IPI extension functions. */
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void sbi_send_ipi(const unsigned long *hart_mask);
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/* RFENCE extension functions. */
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void sbi_remote_fence_i(const unsigned long *hart_mask);
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int sbi_remote_sfence_vma(const unsigned long *hart_mask,
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const unsigned long hart_mask_base,
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unsigned long start, unsigned long size);
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void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, unsigned long start,
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unsigned long size, unsigned long asid);
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/* Hart State Management extension functions. */
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/*
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* Start execution on the specified hart at physical address start_addr. The
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* register a0 will contain the hart's ID, and a1 will contain the value of
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* priv.
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*/
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int sbi_hsm_hart_start(unsigned long hart, unsigned long start_addr, unsigned long priv);
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/*
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* Stop execution on the current hart. Interrupts should be disabled, or this
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* function may return.
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*/
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void sbi_hsm_hart_stop(void);
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/*
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* Get the execution status of the specified hart. The status will be one of:
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* - SBI_HSM_STATUS_STARTED
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* - SBI_HSM_STATUS_STOPPED
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* - SBI_HSM_STATUS_START_PENDING
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* - SBI_HSM_STATUS_STOP_PENDING
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*/
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int sbi_hsm_hart_status(unsigned long hart);
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/* Legacy extension functions. */
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static __inline void
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sbi_console_putchar(int ch)
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{
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(void)SBI_CALL1(SBI_CONSOLE_PUTCHAR, 0, ch);
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}
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static __inline int
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sbi_console_getchar(void)
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{
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/*
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* XXX: The "error" is returned here because legacy SBI functions
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* continue to return their value in a0.
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*/
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return (SBI_CALL0(SBI_CONSOLE_GETCHAR, 0).error);
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}
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static __inline void
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sbi_shutdown(void)
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{
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(void)SBI_CALL0(SBI_SHUTDOWN, 0);
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}
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void sbi_print_version(void);
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void sbi_init(void);
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#endif /* !_MACHINE_SBI_H_ */
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