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102 lines
1.9 KiB
102 lines
1.9 KiB
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Email: opensource_embedded@phytium.com.cn
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*
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* Change Logs:
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* Date Author Notes
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* 2022-10-26 huanghe first commit
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*
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*/
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#include "rtconfig.h"
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#include <rtthread.h>
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#include "gicv3.h"
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#include "fparameters.h"
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#include "fcpu_info.h"
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#include "phytium_cpu.h"
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/**
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@name: phytium_cpu_id_mapping
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@msg: Map Phytium CPU ID
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@brief: Map the input CPU ID to a new CPU ID based on the type and quantity of CPUs on the target board.
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@param {int} cpu_id Input CPU ID
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@return {int} Mapped CPU ID
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*/
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int phytium_cpu_id_mapping(int cpu_id)
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{
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#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
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switch (cpu_id)
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{
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case 0:
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return 2;
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case 1:
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return 3;
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case 2:
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return 0;
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case 3:
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return 1;
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default:
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RT_ASSERT(0);
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return 0;
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break;
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}
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#else
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return (int)cpu_id;
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#endif
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}
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int rt_hw_cpu_id(void)
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{
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FError ret;
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u32 cpu_id;
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ret = GetCpuId(&cpu_id);
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if (ret != ERR_SUCCESS)
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{
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RT_ASSERT(0);
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}
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return phytium_cpu_id_mapping(cpu_id);
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}
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#if defined(TARGET_ARMV8_AARCH32)
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rt_uint64_t get_main_cpu_affval(void)
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{
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#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
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return CORE2_AFF;
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#else
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return CORE0_AFF;
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#endif
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}
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extern u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list);
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rt_uint32_t arm_gic_cpumask_to_affval(rt_uint32_t *cpu_mask, rt_uint32_t *cluster_id, rt_uint32_t *target_list)
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{
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return GetCpuMaskToAffval(cpu_mask, cluster_id, target_list);
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}
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#ifdef RT_USING_SMP
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void send_core_isg(void)
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{
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for (rt_size_t i = 0; i <= 0xf; i++)
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{
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/* code */
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rt_kprintf("i %x \r\n", i);
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arm_gic_send_affinity_sgi(0, 0, i, 0);
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rt_thread_mdelay(100);
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}
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}
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MSH_CMD_EXPORT(send_core_isg, send_core_isg);
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#endif
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#endif
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