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50 lines
1.1 KiB
50 lines
1.1 KiB
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2009-09-22 Bernard add board.h to this bsp
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* 2010-02-04 Magicoe add board.h to LPC176x bsp
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* 2013-12-18 Bernard porting to LPC4088 bsp
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include "LPC407x_8x_177x_8x.h"
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#include <rtthread.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* SRAM allocation for Peripherals */
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#define USB_RAM_BASE 0x20000000
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#define MCI_RAM_BASE 0x20002000
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#define ETH_RAM_BASE 0x20004000
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/* Internal SRAM memory size[Kbytes] <16-256>, Default: 64*/
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#define SRAM_SIZE 64 * 1024
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#define SRAM_END (0x10000000 + SRAM_SIZE)
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="HEAP"
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#define HEAP_BEGIN (__segment_end("HEAP"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN ((void *)&__bss_end)
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#endif
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#define HEAP_END SRAM_END
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void rt_hw_board_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __BOARD_H__ */
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