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100 lines
2.0 KiB
100 lines
2.0 KiB
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-11-06 balanceTWK first version
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*/
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#include <stdint.h>
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#include <rthw.h>
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#include <rtthread.h>
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#include <board.h>
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#include <drv_clk.h>
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#ifdef BSP_USING_SRAM
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#include "drv_sram.h"
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#endif
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/**
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* @brief This function is executed in case of error occurrence.
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* @param None
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* @retval None
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*/
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void Error_Handler(void)
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{
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/* USER CODE BEGIN Error_Handler */
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/* User can add his own implementation to report the HAL error return state */
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while (1)
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{
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}
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/* USER CODE END Error_Handler */
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}
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/** System Clock Configuration
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*/
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void SystemClock_Config(void)
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{
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SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
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NVIC_SetPriority(SysTick_IRQn, 0);
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}
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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/**
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* This function will initial N32 board.
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*/
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void rt_hw_board_init()
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{
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/* NVIC Configuration */
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#define NVIC_VTOR_MASK 0x3FFFFF80
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#ifdef VECT_TAB_RAM
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/* Set the Vector Table base location at 0x10000000 */
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SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK);
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#else /* VECT_TAB_FLASH */
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/* Set the Vector Table base location at 0x08000000 */
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SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK);
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#endif
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SystemClock_Config();
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#ifdef RT_USING_PIN
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int n32_hw_pin_init(void);
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n32_hw_pin_init();
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n32_msp_jtag_init(RT_NULL);
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#endif
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#ifdef RT_USING_SERIAL
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int rt_hw_usart_init(void);
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rt_hw_usart_init();
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#endif
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef BSP_USING_SRAM
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rt_system_heap_init((void *)EXT_SRAM_BEGIN, (void *)EXT_SRAM_END);
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#else
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rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
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#endif
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}
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