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327 lines
6.7 KiB
327 lines
6.7 KiB
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-04-15 Jonne first version for s3c2440 mmc controller
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <drivers/mmcsd_core.h>
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#include <s3c24x0.h>
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#define S3C_PCLK 50000000
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static void s3c_mmc_set_clk(struct rt_mmcsd_host *host, rt_uint32_t clock)
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{
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rt_uint32_t prescale;
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rt_uint32_t realClk;
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for(prescale = 0; prescale < 256; ++prescale)
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{
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realClk = S3C_PCLK / (1 + prescale);
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if(realClk <= clock)
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{
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break;
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}
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}
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SDIPRE = prescale;
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host->io_cfg.clock = realClk;
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}
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static rt_uint32_t s3c_mmc_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd)
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{
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rt_uint32_t ccon;
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rt_uint32_t cmdSta;
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SDICARG = cmd->arg;
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ccon = cmd->cmd_code & 0x3f;
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ccon |= (0 << 7) | (1 << 6); /* two start bits*/
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ccon |= (1 << 8);/* command start*/
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if(cmd->flags & 0xF)
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{
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// Need response
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ccon |= (1 << 9);
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}
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if((cmd->flags & 0xF) == RESP_R2)
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{
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// R2 need 136bit response
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ccon |= (1 << 10);
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}
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SDICCON = ccon; /* start cmd */
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if(cmd->flags & 0xF)
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{
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cmdSta = SDICSTA;
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while((cmdSta & 0x200) != 0x200 && (cmdSta & 0x400) != 0x400)
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{
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cmdSta = SDICSTA;
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}
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if((cmdSta & 0x1000) == 0x1000 && (cmd->flags & 0xF) != RESP_R3 && (cmd->flags & 0xF) != RESP_R4)
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{
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// crc error, but R3 R4 ignore it
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SDICSTA = cmdSta;
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return -RT_ERROR;
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}
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if((cmdSta & 0xF00) != 0xa00)
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{
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SDICSTA = cmdSta;
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return -RT_ERROR;
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}
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cmd->resp[0] = SDIRSP0;
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if((cmd->flags & 0xF) == RESP_R2)
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{
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cmd->resp[1] = SDIRSP1;
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cmd->resp[2] = SDIRSP2;
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cmd->resp[3] = SDIRSP3;
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}
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}
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else
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{
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cmdSta = SDICSTA;
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while((cmdSta & 0x800) != 0x800)
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{
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cmdSta = SDICSTA;
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}
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}
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SDICSTA = cmdSta; // clear current status
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return RT_EOK;
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}
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static rt_uint32_t s3c_mmc_xfer_data(struct rt_mmcsd_data *data)
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{
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rt_uint32_t status;
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rt_uint32_t xfer_size;
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rt_uint32_t handled_size = 0;
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rt_uint32_t *pBuf = RT_NULL;
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if(data == RT_NULL)
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{
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return -RT_ERROR;
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}
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xfer_size = data->blks * data->blksize;
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pBuf = data->buf;
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if(data->flags & DATA_DIR_READ)
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{
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while(handled_size < xfer_size)
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{
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if ((SDIDSTA & 0x20) == 0x20)
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{
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SDIDSTA = (0x1 << 0x5);
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break;
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}
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status = SDIFSTA;
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if ((status & 0x1000) == 0x1000)
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{
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*pBuf++ = SDIDAT;
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handled_size += 4;
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}
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}
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}
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else
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{
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while(handled_size < xfer_size)
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{
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status = SDIFSTA;
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if ((status & 0x2000) == 0x2000)
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{
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SDIDAT = *pBuf++;
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handled_size += 4;
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}
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}
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}
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// wait for end
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status = SDIDSTA;
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while((status & 0x30) == 0)
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{
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status = SDIDSTA;
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}
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SDIDSTA = status;
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if ((status & 0xfc) != 0x10)
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{
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return -RT_ERROR;
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}
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SDIDCON = SDIDCON & ~(7<<12);
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SDIFSTA = SDIFSTA & 0x200;
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SDIDSTA = 0x10;
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return RT_EOK;
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}
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static void mmc_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
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{
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rt_uint32_t ret;
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struct rt_mmcsd_cmd *cmd;
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struct rt_mmcsd_data *data;
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rt_uint32_t val;
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rt_uint32_t tryCnt = 0;
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if(req->cmd == RT_NULL)
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{
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goto out;
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}
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cmd = req->cmd;
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/* prepare for data transfer*/
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if(req->data != RT_NULL)
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{
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SDIFSTA = SDIFSTA | (1<<16); // reset fifo
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while(SDIDSTA & 0x03)
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{
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if(tryCnt++ > 500)
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{
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break;
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SDIDSTA = SDIDSTA;
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}
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}
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data = req->data;
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if((data->blksize & 0x3) != 0)
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{
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goto out;
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}
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val = (2 << 22) //word transfer
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| (1 << 20) // transmet after response
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| (1 << 19) // reciveve after command sent
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| (1 << 17) // block data transfer
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| (1 << 14); // data start
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if(host->io_cfg.bus_width == MMCSD_BUS_WIDTH_4)
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{
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val |= (1 << 16); // wide bus mode(4bit data)
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}
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if(data->flags & DATA_DIR_READ)
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{
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// for data read
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val |= (2 << 12);
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}
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else
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{
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val |= (3 << 12);
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}
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val |= (data->blks & 0xFFF);
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SDIDCON = val;
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SDIBSIZE = data->blksize;
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SDIDTIMER = 0x7fffff;
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}
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ret = s3c_mmc_send_cmd(host,req->cmd);
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if(ret != RT_EOK) {
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cmd->err = ret;
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goto out;
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}
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if(req->data != RT_NULL)
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{
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/*do transfer data*/
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ret = s3c_mmc_xfer_data(data);
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if(ret != RT_EOK)
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{
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data->err = ret;
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goto out;
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}
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}
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out:
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mmcsd_req_complete(host);
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}
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static void mmc_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
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{
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switch (io_cfg->power_mode) {
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case MMCSD_POWER_ON:
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case MMCSD_POWER_UP:
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/* Enable PCLK into SDI Block */
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CLKCON |= 1 << 9;
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/* Setup GPIO as SD and SDCMD, SDDAT[3:0] Pull up En */
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GPEUP = GPEUP & (~(0x3f << 5)) | (0x01 << 5);
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GPECON = GPECON & (~(0xfff << 10)) | (0xaaa << 10);
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break;
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case MMCSD_POWER_OFF:
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default:
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break;
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}
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s3c_mmc_set_clk(host, io_cfg->clock);
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SDICON = 1;
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}
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static rt_int32_t mmc_get_card_status(struct rt_mmcsd_host *host)
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{
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return RT_EOK;
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}
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static void mmc_enable_sdio_irq(struct rt_mmcsd_host *host, rt_int32_t en)
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{
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}
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static const struct rt_mmcsd_host_ops ops =
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{
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mmc_request,
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mmc_set_iocfg,
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mmc_get_card_status,
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mmc_enable_sdio_irq
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};
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int s3c_sdio_init(void)
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{
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struct rt_mmcsd_host * host = RT_NULL;
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host = mmcsd_alloc_host();
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if (!host)
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{
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goto err;
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}
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host->ops = &ops;
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host->freq_min = 300000;
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host->freq_max = 50000000;
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host->valid_ocr = VDD_32_33 | VDD_33_34;
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host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED | MMCSD_SUP_SDIO_IRQ | MMCSD_BUSWIDTH_4;
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host->max_seg_size = 2048;
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host->max_dma_segs = 10;
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host->max_blk_size = 512;
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host->max_blk_count = 4096;
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mmcsd_change(host);
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return RT_EOK;
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err:
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if(host) rt_free(host);
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return -RT_EIO;
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}
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INIT_DEVICE_EXPORT(s3c_sdio_init);
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