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109 lines
5.8 KiB
109 lines
5.8 KiB
#ifndef SERIAL_REG_H
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#define SERIAL_REG_H
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/** @brief Base addresses of UART memory mapped registers */
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#define UART0_BASE (0x44E09000)
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#define UART1_BASE (0x48022000)
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#define UART2_BASE (0x48024000)
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#define UART3_BASE (0x481A6000)
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#define UART4_BASE (0x481A8000)
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#define UART5_BASE (0x481AA000)
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/* UART registers */
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#define UART_DLL(base) (base + 0x0)
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#define UART_RHR(base) (base + 0x0)
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#define UART_THR(base) (base + 0x0)
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#define UART_DLH(base) (base + 0x4)
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#define UART_IER(base) (base + 0x4)
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#define UART_EFR(base) (base + 0x8)
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#define UART_FCR(base) (base + 0x8)
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#define UART_IIR(base) (base + 0x8)
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#define UART_LCR(base) (base + 0xC)
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#define UART_MCR(base) (base + 0x10)
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#define UART_XON1_ADDR1(base) (base + 0x10)
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#define UART_LSR(base) (base + 0x14)
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#define UART_XON2_ADDR2(base) (base + 0x14)
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#define UART_MSR(base) (base + 0x18)
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#define UART_TCR(base) (base + 0x18)
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#define UART_XOFF1(base) (base + 0x18)
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#define UART_SPR(base) (base + 0x1C)
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#define UART_TLR(base) (base + 0x1C)
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#define UART_XOFF2(base) (base + 0x1C)
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#define UART_MDR1(base) (base + 0x20)
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#define UART_MDR2(base) (base + 0x24)
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#define UART_SFLSR(base) (base + 0x28)
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#define UART_TXFLL(base) (base + 0x28)
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#define UART_RESUME(base) (base + 0x2C)
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#define UART_TXFLH(base) (base + 0x2C)
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#define UART_RXFLL(base) (base + 0x30)
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#define UART_SFREGL(base) (base + 0x30)
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#define UART_RXFLH(base) (base + 0x34)
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#define UART_SFREGH(base) (base + 0x34)
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#define UART_BLR(base) (base + 0x38)
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#define UART_UASR(base) (base + 0x38)
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#define UART_ACREG(base) (base + 0x3C)
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#define UART_SCR(base) (base + 0x40)
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#define UART_SSR(base) (base + 0x44)
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#define UART_EBLR(base) (base + 0x48)
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#define UART_MVR(base) (base + 0x50)
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#define UART_SYSC(base) (base + 0x54)
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#define UART_SYSS(base) (base + 0x58)
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#define UART_WER(base) (base + 0x5C)
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#define UART_CFPS(base) (base + 0x60)
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#define UART_RXFIFO_LVL(base) (base + 0x64)
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#define UART_TXFIFO_LVL(base) (base + 0x68)
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#define UART_IER2(base) (base + 0x6C)
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#define UART_ISR2(base) (base + 0x70)
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#define UART_FREQ_SEL(base) (base + 0x74)
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#define UART_MDR3(base) (base + 0x80)
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#define UART_TX_DMA_THRESHOLD(base) (base + 0x84)
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#define UART_DLL_REG(base) REG16(UART_DLL(base))
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#define UART_RHR_REG(base) REG16(UART_RHR(base))
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#define UART_THR_REG(base) REG16(UART_THR(base))
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#define UART_DLH_REG(base) REG16(UART_DLH(base))
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#define UART_IER_REG(base) REG16(UART_IER(base))
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#define UART_EFR_REG(base) REG16(UART_EFR(base))
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#define UART_FCR_REG(base) REG16(UART_FCR(base))
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#define UART_IIR_REG(base) REG16(UART_IIR(base))
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#define UART_LCR_REG(base) REG16(UART_LCR(base))
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#define UART_MCR_REG(base) REG16(UART_MCR(base))
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#define UART_XON1_ADDR1_REG(base) REG16(UART_XON1_ADDR1(base))
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#define UART_LSR_REG(base) REG16(UART_LSR(base))
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#define UART_XON2_ADDR2_REG(base) REG16(UART_XON2_ADDR2(base))
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#define UART_MSR_REG(base) REG16(UART_MSR(base))
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#define UART_TCR_REG(base) REG16(UART_TCR(base))
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#define UART_XOFF1_REG(base) REG16(UART_XOFF1(base))
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#define UART_SPR_REG(base) REG16(UART_SPR(base))
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#define UART_TLR_REG(base) REG16(UART_TLR(base))
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#define UART_XOFF2_REG(base) REG16(UART_XOFF2(base))
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#define UART_MDR1_REG(base) REG16(UART_MDR1(base))
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#define UART_MDR2_REG(base) REG16(UART_MDR2(base))
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#define UART_SFLSR_REG(base) REG16(UART_SFLSR(base))
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#define UART_TXFLL_REG(base) REG16(UART_TXFLL(base))
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#define UART_RESUME_REG(base) REG16(UART_RESUME(base))
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#define UART_TXFLH_REG(base) REG16(UART_TXFLH(base))
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#define UART_RXFLL_REG(base) REG16(UART_RXFLL(base))
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#define UART_SFREGL_REG(base) REG16(UART_SFREGL(base))
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#define UART_RXFLH_REG(base) REG16(UART_RXFLH(base))
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#define UART_SFREGH_REG(base) REG16(UART_SFREGH(base))
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#define UART_BLR_REG(base) REG16(UART_BLR(base))
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#define UART_UASR_REG(base) REG16(UART_UASR(base))
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#define UART_ACREG_REG(base) REG16(UART_ACREG(base))
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#define UART_SCR_REG(base) REG16(UART_SCR(base))
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#define UART_SSR_REG(base) REG16(UART_SSR(base))
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#define UART_EBLR_REG(base) REG16(UART_EBLR(base))
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#define UART_MVR_REG(base) REG16(UART_MVR(base))
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#define UART_SYSC_REG(base) REG16(UART_SYSC(base))
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#define UART_SYSS_REG(base) REG16(UART_SYSS(base))
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#define UART_WER_REG(base) REG16(UART_WER(base))
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#define UART_CFPS_REG(base) REG16(UART_CFPS(base))
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#define UART_RXFIFO_LVL_REG(base) REG16(UART_RXFIFO_LVL(base))
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#define UART_TXFIFO_LVL_REG(base) REG16(UART_TXFIFO_LVL(base))
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#define UART_IER2_REG(base) REG16(UART_IER2(base))
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#define UART_ISR2_REG(base) REG16(UART_ISR2(base))
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#define UART_FREQ_SEL_REG(base) REG16(UART_FREQ_SEL(base))
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#define UART_MDR3_REG(base) REG16(UART_MDR3(base))
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#define UART_TX_DMA_THRESHOLD_REG(base) REG16(UART_TX_DMA_THRESHOLD(base))
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#endif /* end of include guard: SERIAL_REG_H */
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