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129 lines
3.6 KiB
129 lines
3.6 KiB
/******************************************************************************
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* Copyright (c) 2015-2023 jiangxiaogang<kerndev@foxmail.com>
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*
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* This file is part of KLite distribution.
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*
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* KLite is free software, you can redistribute it and/or modify it under
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* the MIT Licence.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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******************************************************************************/
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#include "kernel.h"
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#include "arm.h"
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#include "intc.h"
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#include "f1c100s.h"
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#define PENDING_IRQ IRQ_WATCHDOG
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#define SYSTICK_IRQ IRQ_TIMER0
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static uint32_t m_lock_nesting;
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static uint32_t m_cpsr_backup;
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static void pending_handler(void)
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{
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intc_clear_pending(PENDING_IRQ);
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}
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static void systick_handler(void)
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{
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kernel_tick(1);
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TIMER->ISR |= 0x01;
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}
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static void systick_init(void)
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{
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TIMER->TIM0_CTRL &= ~0x01;
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TIMER->ISR |= 0x01;
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TIMER->IER |= 0x01;
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TIMER->TIM0_INTV = 24000;
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TIMER->TIM0_CTRL = 0x4;
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TIMER->TIM0_CTRL |= 0x02;
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while(TIMER->TIM0_CTRL & 0x02);
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TIMER->TIM0_CTRL |= 0x01;
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}
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void cpu_sys_init(void)
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{
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arm_disable_irq();
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intc_init();
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intc_set_priority(SYSTICK_IRQ, 0); //0 is lowest
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intc_set_priority(PENDING_IRQ, 0);
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intc_set_handler(SYSTICK_IRQ, systick_handler);
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intc_set_handler(PENDING_IRQ, pending_handler);
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intc_enable_irq(SYSTICK_IRQ);
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intc_enable_irq(PENDING_IRQ);
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}
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void cpu_sys_start(void)
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{
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systick_init();
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arm_enable_irq();
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}
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void cpu_sys_sleep(uint32_t time)
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{
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}
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void cpu_enter_critical(void)
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{
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uint32_t cpsr;
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cpsr = arm_read_cpsr_c();
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arm_write_cpsr_c(cpsr | 0x80);
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if(m_lock_nesting++ == 0)
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{
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m_cpsr_backup = cpsr;
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}
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}
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void cpu_leave_critical(void)
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{
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if(--m_lock_nesting == 0)
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{
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arm_write_cpsr_c(m_cpsr_backup);
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}
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}
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void *cpu_contex_init(void *stack_base, void *stack_top, void *entry, void *arg, void *exit)
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{
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uint32_t *sp;
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sp = (uint32_t *)(((uint32_t)stack_top) & 0xFFFFFFF8);
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*(--sp) = (uint32_t)entry; // PC
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*(--sp) = (uint32_t)exit; // LR
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*(--sp) = 7; // R7
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*(--sp) = 6; // R6
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*(--sp) = 5; // R5
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*(--sp) = 4; // R4
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*(--sp) = 3; // R3
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*(--sp) = 2; // R2
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*(--sp) = 1; // R1
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*(--sp) = (uint32_t)arg; // R0
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*(--sp) = 12; // R12
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*(--sp) = 11; // R11
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*(--sp) = 10; // R10
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*(--sp) = 9; // R9
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*(--sp) = 8; // R8
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*(--sp) = 0x00000053; // xPSR = SVC,FIQ=disable,IRQ=enable
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return sp;
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}
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void cpu_contex_switch(void)
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{
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intc_set_pending(PENDING_IRQ);
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}
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