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35 lines
736 B
35 lines
736 B
10 months ago
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2016-09-07 Urey the first version
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*/
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#ifndef _MIPS_CFG_H_
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#define _MIPS_CFG_H_
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#ifndef __ASSEMBLY__
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#include <stdint.h>
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typedef struct mips32_core_cfg
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{
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uint16_t icache_line_size;
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uint16_t icache_lines_per_way;
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uint16_t icache_ways;
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uint16_t icache_size;
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uint16_t dcache_line_size;
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uint16_t dcache_lines_per_way;
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uint16_t dcache_ways;
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uint16_t dcache_size;
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uint16_t max_tlb_entries; /* number of tlb entry */
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} mips32_core_cfg_t;
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extern mips32_core_cfg_t g_mips_core;
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#endif /* __ASSEMBLY__ */
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#endif /* _MIPS_CFG_H_ */
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