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160 lines
12 KiB
160 lines
12 KiB
5 months ago
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<raConfiguration version="8">
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<generalSettings>
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<option key="#Board#" value="board.ra8m1ek"/>
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<option key="CPU" value="RA8M1"/>
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<option key="Core" value="CM85"/>
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<option key="#TargetName#" value="R7FA8M1AHECBD"/>
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<option key="#TargetARCHITECTURE#" value="cortex-m85"/>
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<option key="#DeviceCommand#" value="R7FA8M1AH"/>
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<option key="#RTOS#" value="_none"/>
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<option key="#pinconfiguration#" value="R7FA8M1AHECBD.pincfg"/>
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<option key="#FSPVersion#" value="5.0.0"/>
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<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra8m1_ek##"/>
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<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
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</generalSettings>
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<raBspConfiguration/>
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<raClockConfiguration>
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<node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
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<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.48m"/>
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<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
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<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
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<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
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<node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
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<node id="board.clock.pll.div" option="board.clock.pll.div.1"/>
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<node id="board.clock.pll.mul" option="board.clock.pll.mul.48_00"/>
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<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
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<node id="board.clock.pll1p.div" option="board.clock.pll1p.div.2"/>
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<node id="board.clock.pll1p.display" option="board.clock.pll1p.display.value"/>
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<node id="board.clock.pll1q.div" option="board.clock.pll1q.div.2"/>
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<node id="board.clock.pll1q.display" option="board.clock.pll1q.display.value"/>
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<node id="board.clock.pll1r.div" option="board.clock.pll1r.div.2"/>
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<node id="board.clock.pll1r.display" option="board.clock.pll1r.display.value"/>
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<node id="board.clock.pll2.source" option="board.clock.pll2.source.disabled"/>
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<node id="board.clock.pll2.div" option="board.clock.pll2.div.1"/>
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<node id="board.clock.pll2.mul" option="board.clock.pll2.mul.48_00"/>
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<node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
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<node id="board.clock.pll2p.div" option="board.clock.pll2p.div.2"/>
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<node id="board.clock.pll2p.display" option="board.clock.pll2p.display.value"/>
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<node id="board.clock.pll2q.div" option="board.clock.pll2q.div.2"/>
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<node id="board.clock.pll2q.display" option="board.clock.pll2q.display.value"/>
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<node id="board.clock.pll2r.div" option="board.clock.pll2r.div.2"/>
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<node id="board.clock.pll2r.display" option="board.clock.pll2r.display.value"/>
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<node id="board.clock.clock.source" option="board.clock.clock.source.pll1p"/>
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<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
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<node id="board.clock.sciclk.source" option="board.clock.sciclk.source.pll1p"/>
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<node id="board.clock.spiclk.source" option="board.clock.spiclk.source.disabled"/>
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<node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
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<node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
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<node id="board.clock.uck.source" option="board.clock.uck.source.disabled"/>
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<node id="board.clock.u60ck.source" option="board.clock.u60ck.source.disabled"/>
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<node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.disabled"/>
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<node id="board.clock.cpuclk.div" option="board.clock.cpuclk.div.1"/>
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<node id="board.clock.iclk.div" option="board.clock.iclk.div.2"/>
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<node id="board.clock.pclka.div" option="board.clock.pclka.div.4"/>
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<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.8"/>
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<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.8"/>
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<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.4"/>
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<node id="board.clock.pclke.div" option="board.clock.pclke.div.2"/>
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<node id="board.clock.sdclkout.enable" option="board.clock.sdclkout.enable.enabled"/>
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<node id="board.clock.bclk.div" option="board.clock.bclk.div.4"/>
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<node id="board.clock.bclkout.div" option="board.clock.bclkout.div.2"/>
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<node id="board.clock.fclk.div" option="board.clock.fclk.div.8"/>
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<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
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<node id="board.clock.sciclk.div" option="board.clock.sciclk.div.4"/>
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<node id="board.clock.spiclk.div" option="board.clock.spiclk.div.4"/>
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<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.8"/>
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<node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.3"/>
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<node id="board.clock.uck.div" option="board.clock.uck.div.5"/>
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<node id="board.clock.u60ck.div" option="board.clock.u60ck.div.5"/>
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<node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.4"/>
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<node id="board.clock.cpuclk.display" option="board.clock.cpuclk.display.value"/>
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<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
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<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
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<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
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<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
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<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
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<node id="board.clock.pclke.display" option="board.clock.pclke.display.value"/>
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<node id="board.clock.sdclkout.display" option="board.clock.sdclkout.display.value"/>
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<node id="board.clock.bclk.display" option="board.clock.bclk.display.value"/>
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<node id="board.clock.bclkout.display" option="board.clock.bclkout.display.value"/>
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<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
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<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
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<node id="board.clock.sciclk.display" option="board.clock.sciclk.display.value"/>
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<node id="board.clock.spiclk.display" option="board.clock.spiclk.display.value"/>
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<node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
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<node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
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<node id="board.clock.uck.display" option="board.clock.uck.display.value"/>
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<node id="board.clock.u60ck.display" option="board.clock.u60ck.display.value"/>
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<node id="board.clock.octaspiclk.display" option="board.clock.octaspiclk.display.value"/>
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</raClockConfiguration>
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<raPinConfiguration>
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<pincfg active="true" name="" symbol="">
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<configSetting altId="adc0.an000.p004" configurationId="adc0.an000"/>
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<configSetting altId="adc0.an001.p005" configurationId="adc0.an001"/>
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<configSetting altId="adc0.an004.p007" configurationId="adc0.an004"/>
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<configSetting altId="adc0.an007.p014" configurationId="adc0.an007"/>
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<configSetting altId="adc1.an102.p002" configurationId="adc1.an102"/>
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<configSetting altId="adc1.an104.p003" configurationId="adc1.an104"/>
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<configSetting altId="adc1.an105.p015" configurationId="adc1.an105"/>
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<configSetting altId="adc1.an106.p011" configurationId="adc1.an106"/>
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<configSetting altId="ether_rmii.et0_linksta.p114" configurationId="ether_rmii.et0_linksta"/>
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<configSetting altId="ether_rmii.et0_mdc.p308" configurationId="ether_rmii.et0_mdc"/>
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<configSetting altId="ether_rmii.et0_mdio.p307" configurationId="ether_rmii.et0_mdio"/>
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<configSetting altId="ether_rmii.ref50ck0.p303" configurationId="ether_rmii.ref50ck0"/>
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<configSetting altId="ether_rmii.rmii0_crs_dv.p112" configurationId="ether_rmii.rmii0_crs_dv"/>
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<configSetting altId="ether_rmii.rmii0_rx_er.p300" configurationId="ether_rmii.rmii0_rx_er"/>
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<configSetting altId="ether_rmii.rmii0_rxd0.p302" configurationId="ether_rmii.rmii0_rxd0"/>
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<configSetting altId="ether_rmii.rmii0_rxd1.p301" configurationId="ether_rmii.rmii0_rxd1"/>
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<configSetting altId="ether_rmii.rmii0_txd0.p304" configurationId="ether_rmii.rmii0_txd0"/>
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<configSetting altId="ether_rmii.rmii0_txd1.p305" configurationId="ether_rmii.rmii0_txd1"/>
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<configSetting altId="ether_rmii.rmii0_txd_en.p306" configurationId="ether_rmii.rmii0_txd_en"/>
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<configSetting altId="iic1.scl1.p512" configurationId="iic1.scl1"/>
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<configSetting altId="iic1.sda1.p511" configurationId="iic1.sda1"/>
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<configSetting altId="irq12.irq12_dash_ds.p008" configurationId="irq12.irq12_dash_ds"/>
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<configSetting altId="irq13.irq13_dash_ds.p009" configurationId="irq13.irq13_dash_ds"/>
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<configSetting altId="jtag_fslash_swd.tck.p211" configurationId="jtag_fslash_swd.tck"/>
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<configSetting altId="jtag_fslash_swd.tdi.p208" configurationId="jtag_fslash_swd.tdi"/>
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<configSetting altId="jtag_fslash_swd.tdo.p209" configurationId="jtag_fslash_swd.tdo"/>
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<configSetting altId="jtag_fslash_swd.tms.p210" configurationId="jtag_fslash_swd.tms"/>
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<configSetting altId="ospi.om_cs1.p104" configurationId="ospi.om_cs1"/>
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<configSetting altId="ospi.om_dqs.p801" configurationId="ospi.om_dqs"/>
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<configSetting altId="ospi.om_ecsint1.p105" configurationId="ospi.om_ecsint1"/>
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<configSetting altId="ospi.om_reset.p106" configurationId="ospi.om_reset"/>
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<configSetting altId="ospi.om_sclk.p808" configurationId="ospi.om_sclk"/>
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<configSetting altId="ospi.om_sio0.p100" configurationId="ospi.om_sio0"/>
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<configSetting altId="ospi.om_sio1.p803" configurationId="ospi.om_sio1"/>
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<configSetting altId="ospi.om_sio2.p103" configurationId="ospi.om_sio2"/>
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<configSetting altId="ospi.om_sio3.p101" configurationId="ospi.om_sio3"/>
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<configSetting altId="ospi.om_sio4.p102" configurationId="ospi.om_sio4"/>
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<configSetting altId="ospi.om_sio5.p800" configurationId="ospi.om_sio5"/>
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<configSetting altId="ospi.om_sio6.p802" configurationId="ospi.om_sio6"/>
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<configSetting altId="ospi.om_sio7.p804" configurationId="ospi.om_sio7"/>
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<configSetting altId="p000.input" configurationId="p000"/>
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<configSetting altId="p107.output.low" configurationId="p107"/>
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<configSetting altId="p414.output.low" configurationId="p414"/>
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<configSetting altId="p600.output.low" configurationId="p600"/>
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<configSetting altId="p809.output.low" configurationId="p809"/>
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<configSetting altId="pa06.input" configurationId="pa06"/>
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<configSetting altId="sci2.cts_rts2.pa05" configurationId="sci2.cts_rts2"/>
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<configSetting altId="sci2.rxd2.pa02" configurationId="sci2.rxd2"/>
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<configSetting altId="sci2.sck2.pa04" configurationId="sci2.sck2"/>
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<configSetting altId="sci2.txd2.pa03" configurationId="sci2.txd2"/>
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<configSetting altId="sci9.rxd9.pa15" configurationId="sci9.rxd9" isUsedByDriver="true"/>
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<configSetting altId="sci9.txd9.pa14" configurationId="sci9.txd9" isUsedByDriver="true"/>
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<configSetting altId="spi1.miso1.p410" configurationId="spi1.miso1"/>
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<configSetting altId="spi1.mosi1.p411" configurationId="spi1.mosi1"/>
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<configSetting altId="spi1.rspck1.p412" configurationId="spi1.rspck1"/>
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<configSetting altId="spi1.sslb0.p413" configurationId="spi1.sslb0"/>
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<configSetting altId="usbfs.usb_dm.p815" configurationId="usbfs.usb_dm"/>
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<configSetting altId="usbfs.usb_dp.p814" configurationId="usbfs.usb_dp"/>
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<configSetting altId="usbfs.usb_ovrcura.p501" configurationId="usbfs.usb_ovrcura"/>
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<configSetting altId="usbfs.usb_vbus.p407" configurationId="usbfs.usb_vbus"/>
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<configSetting altId="usbfs.usb_vbusen.p500" configurationId="usbfs.usb_vbusen"/>
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<configSetting altId="usbhs.usbhs_ovrcura.p409" configurationId="usbhs.usbhs_ovrcura"/>
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<configSetting altId="usbhs.usbhs_vbus.pb01" configurationId="usbhs.usbhs_vbus"/>
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<configSetting altId="usbhs.usbhs_vbusen.p408" configurationId="usbhs.usbhs_vbusen"/>
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</pincfg>
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</raPinConfiguration>
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</raConfiguration>
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