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65 lines
4.1 KiB
65 lines
4.1 KiB
5 months ago
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<raConfiguration version="7">
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<generalSettings>
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<option key="#Board#" value="board.custom"/>
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<option key="CPU" value="RA4M2"/>
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<option key="Core" value="CM33"/>
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<option key="#TargetName#" value="R7FA4M2AD3CFP"/>
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<option key="#TargetARCHITECTURE#" value="cortex-m33"/>
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<option key="#DeviceCommand#" value="R7FA4M2AD"/>
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<option key="#RTOS#" value="_none"/>
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<option key="#pinconfiguration#" value="R7FA4M2AD3CFP.pincfg"/>
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<option key="#FSPVersion#" value="4.2.0"/>
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<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
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</generalSettings>
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<raClockConfiguration>
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<node id="board.clock.xtal.freq" mul="24000000" option="_edit"/>
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<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.20m"/>
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<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
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<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
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<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
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<node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
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<node id="board.clock.pll.div" option="board.clock.pll.div.3"/>
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<node id="board.clock.pll.mul" option="board.clock.pll.mul.250"/>
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<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
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<node id="board.clock.pll2.source" option="board.clock.pll2.source.disabled"/>
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<node id="board.clock.pll2.div" option="board.clock.pll2.div.2"/>
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<node id="board.clock.pll2.mul" option="board.clock.pll2.mul.200"/>
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<node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
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<node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
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<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
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<node id="board.clock.uclk.source" option="board.clock.uclk.source.disabled"/>
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<node id="board.clock.iclk.div" option="board.clock.iclk.div.2"/>
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<node id="board.clock.pclka.div" option="board.clock.pclka.div.2"/>
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<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.4"/>
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<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.4"/>
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<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.2"/>
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<node id="board.clock.fclk.div" option="board.clock.fclk.div.4"/>
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<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
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<node id="board.clock.uclk.div" option="board.clock.uclk.div.5"/>
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<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
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<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
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<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
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<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
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<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
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<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
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<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
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<node id="board.clock.uclk.display" option="board.clock.uclk.display.value"/>
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</raClockConfiguration>
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<raModuleConfiguration/>
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<raPinConfiguration>
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<pincfg active="true" name="" symbol="">
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<configSetting altId="debug0.swclk.p300" configurationId="debug0.swclk" isUsedByDriver="true"/>
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<configSetting altId="debug0.swdio.p108" configurationId="debug0.swdio" isUsedByDriver="true"/>
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<configSetting altId="p603.output.high" configurationId="p603"/>
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<configSetting altId="sci0.rxd.p100" configurationId="sci0.rxd" isUsedByDriver="true"/>
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<configSetting altId="sci0.txd.p101" configurationId="sci0.txd" isUsedByDriver="true"/>
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<configSetting altId="sci4.rxd.p206" configurationId="sci4.rxd" isUsedByDriver="true"/>
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<configSetting altId="sci4.txd.p207" configurationId="sci4.txd" isUsedByDriver="true"/>
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<configSetting altId="sci9.rxd.p601" configurationId="sci9.rxd" isUsedByDriver="true"/>
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<configSetting altId="sci9.sck.p600" configurationId="sci9.sck" isUsedByDriver="true"/>
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<configSetting altId="sci9.txd.p602" configurationId="sci9.txd" isUsedByDriver="true"/>
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</pincfg>
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</raPinConfiguration>
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</raConfiguration>
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