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410 lines
13 KiB
410 lines
13 KiB
5 months ago
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2010-12-21 onelife Initial creation for EFM32
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* 2011-05-06 onelife Add EFM32 development kit and SPI Flash support
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* 2011-07-12 onelife Add SWO output enable function
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* 2011-12-08 onelife Add giant gecko development kit support
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* 2011-12-09 onelife Add giant gecko support
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* 2011-12-09 onelife Add LEUART module support
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* 2011-12-14 onelife Add LFXO enabling routine in driver initialization function
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* 2011-12-15 onelife Add MicroSD initialization routine in driver
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* initialization function
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* 2011-12-29 onelife Add keys and joystick initialization routine in
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* driver initialization function
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* 2012-02-15 onelife Modify SWO setup function to support giant gecko
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* 2012-xx-xx onelife Modify system clock and ticket related code
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*/
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/***************************************************************************//**
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* @addtogroup efm32
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* @{
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******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "board.h"
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == RAM_MEM_BASE) || \
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((VECTTAB) == FLASH_MEM_BASE))
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#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
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/***************************************************************************//**
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* @addtogroup SysTick_clock_source
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* @{
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******************************************************************************/
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#define SysTick_CLKSource_MASK ((rt_uint32_t)0x00000004)
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#define SysTick_CLKSource_RTC ((rt_uint32_t)0x00000000)
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#define SysTick_CLKSource_HFCORECLK ((rt_uint32_t)0x00000004)
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#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_RTC) || \
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((SOURCE) == SysTick_CLKSource_HFCORECLK))
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/***************************************************************************//**
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* @}
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******************************************************************************/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/***************************************************************************//**
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* @brief
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* Set the allocation and offset of the vector table
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*
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* @details
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*
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* @note
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*
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* @param[in] NVIC_VectTab
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* Indicate the vector table is allocated in RAM or ROM
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*
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* @param[in] Offset
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* The vector table offset
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******************************************************************************/
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static void NVIC_SetVectorTable(
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rt_uint32_t NVIC_VectTab,
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rt_uint32_t Offset)
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{
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/* Check the parameters */
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RT_ASSERT(IS_NVIC_VECTTAB(NVIC_VectTab));
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RT_ASSERT(IS_NVIC_OFFSET(Offset));
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SCB->VTOR = NVIC_VectTab | (Offset & (rt_uint32_t)0x1FFFFF80);
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}
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/***************************************************************************//**
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* @brief
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* Configure the address of vector table
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*
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* @details
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*
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* @note
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*
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******************************************************************************/
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static void NVIC_Configuration(void)
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{
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#ifdef VECT_TAB_RAM
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/* Set the vector table allocated at 0x20000000 */
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NVIC_SetVectorTable(RAM_MEM_BASE, 0x0);
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#else /* VECT_TAB_FLASH */
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/* Set the vector table allocated at 0x00000000 */
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NVIC_SetVectorTable(FLASH_MEM_BASE, 0x0);
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#endif
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/* Set NVIC Preemption Priority Bits: 0 bit for pre-emption, 4 bits for
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subpriority */
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NVIC_SetPriorityGrouping(0x7UL);
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/* Set Base Priority Mask Register */
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__set_BASEPRI(EFM32_BASE_PRI_DEFAULT);
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}
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/***************************************************************************//**
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* @brief
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* Configure the SysTick clock source
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*
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* @details
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*
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* @note
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*
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* @param[in] SysTick_CLKSource
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* Specifies the SysTick clock source.
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*
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* @arg SysTick_CLKSource_HCLK_Div8
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* AHB clock divided by 8 selected as SysTick clock source.
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*
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* @arg SysTick_CLKSource_HCLK
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* AHB clock selected as SysTick clock source.
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******************************************************************************/
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static void SysTick_CLKSourceConfig(rt_uint32_t SysTick_CLKSource)
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{
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/* Check the parameters */
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RT_ASSERT(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
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rt_uint32_t ctrl = SysTick->CTRL;
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ctrl &= ~SysTick_CLKSource_MASK;
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ctrl |= SysTick_CLKSource;
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SysTick->CTRL = ctrl;
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}
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/***************************************************************************//**
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* @brief
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* Configure the SysTick for OS tick.
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*
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* @details
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*
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* @note
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*
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******************************************************************************/
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static void SysTick_Configuration(void)
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{
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#if defined(EFM32_USING_LFXO)
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/* LETIMER0 configurations */
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const LETIMER_Init_TypeDef letimerInit =
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{
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.enable = true, /* Start counting when init completed. */
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.debugRun = false, /* Counter shall not keep running during debug halt. */
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.rtcComp0Enable = false, /* Don't start counting on RTC COMP0 match. */
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.rtcComp1Enable = false, /* Don't start counting on RTC COMP1 match. */
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.comp0Top = true, /* Load COMP0 register into CNT when counter underflows. COMP is used as TOP */
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.bufTop = false, /* Don't load COMP1 into COMP0 when REP0 reaches 0. */
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.out0Pol = 0, /* Idle value for output 0. */
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.out1Pol = 0, /* Idle value for output 1. */
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.ufoa0 = letimerUFOANone, /* No output on output 0. */
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.ufoa1 = letimerUFOANone, /* No output on output 1. */
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.repMode = letimerRepeatFree /* Count until stopped by SW. */
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};
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CMU_ClockDivSet(cmuClock_LETIMER0, cmuClkDiv_8);
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CMU_ClockEnable(cmuClock_LETIMER0, true);
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LETIMER_CompareSet(LETIMER0, 0,
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EFM32_LETIMER_TOP_100HZ * RT_TICK_PER_SECOND / 100);
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/* Enable underflow interrupt */
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LETIMER_IntClear(LETIMER0, LETIMER_IF_UF);
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LETIMER_IntEnable(LETIMER0, LETIMER_IF_UF);
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/* Enable LETIMER0 interrupt vector in NVIC */
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NVIC_ClearPendingIRQ(LETIMER0_IRQn);
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NVIC_SetPriority(LETIMER0_IRQn, EFM32_IRQ_PRI_DEFAULT);
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NVIC_EnableIRQ(LETIMER0_IRQn);
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/* Start LETIMER0 */
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LETIMER_Init(LETIMER0, &letimerInit);
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#else
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rt_uint32_t coreClk;
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rt_uint32_t cnts;
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coreClk = SystemCoreClockGet();
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cnts = coreClk / RT_TICK_PER_SECOND;
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SysTick_Config(cnts);
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SysTick_CLKSourceConfig(SysTick_CLKSource_HFCORECLK);
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#endif
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}
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/***************************************************************************//**
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* @brief
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* Enable SWO.
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*
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* @details
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*
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* @note
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*
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******************************************************************************/
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void Swo_Configuration(void)
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{
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rt_uint32_t *dwt_ctrl = (rt_uint32_t *) 0xE0001000;
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rt_uint32_t *tpiu_prescaler = (rt_uint32_t *) 0xE0040010;
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rt_uint32_t *tpiu_protocol = (rt_uint32_t *) 0xE00400F0;
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CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
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/* Enable Serial wire output pin */
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GPIO->ROUTE |= GPIO_ROUTE_SWOPEN;
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#if defined(_EFM32_GIANT_FAMILY)
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/* Set location 0 */
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GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | GPIO_ROUTE_SWLOCATION_LOC0;
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/* Enable output on pin - GPIO Port F, Pin 2 */
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GPIO->P[5].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK);
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GPIO->P[5].MODEL |= GPIO_P_MODEL_MODE2_PUSHPULL;
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#else
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/* Set location 1 */
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GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | GPIO_ROUTE_SWLOCATION_LOC1;
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/* Enable output on pin */
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GPIO->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE15_MASK);
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GPIO->P[2].MODEH |= GPIO_P_MODEH_MODE15_PUSHPULL;
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#endif
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/* Enable debug clock AUXHFRCO */
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CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
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while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
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/* Enable trace in core debug */
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CoreDebug->DHCSR |= 1;
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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/* Enable PC and IRQ sampling output */
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*dwt_ctrl = 0x400113FF;
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/* Set TPIU prescaler to 16. */
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*tpiu_prescaler = 0xf;
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/* Set protocol to NRZ */
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*tpiu_protocol = 2;
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/* Unlock ITM and output data */
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ITM->LAR = 0xC5ACCE55;
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ITM->TCR = 0x10009;
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}
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/***************************************************************************//**
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* @brief
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* Initialize the board.
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*
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* @details
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*
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* @note
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*
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******************************************************************************/
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void rt_hw_board_init(void)
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{
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/* Chip errata */
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CHIP_Init();
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/* Initialize DVK board register access */
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#if defined(EFM32_GXXX_DK)
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DVK_init();
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#elif defined(EFM32GG_DK3750)
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DVK_init(DVK_Init_EBI);
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/* Disable all DVK interrupts */
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DVK_disableInterrupt(BC_INTEN_MASK);
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DVK_clearInterruptFlags(BC_INTFLAG_MASK);
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#endif
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/* config NVIC Configuration */
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NVIC_Configuration();
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#if defined(EFM32_USING_HFXO)
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/* Configure external oscillator */
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SystemHFXOClockSet(EFM32_HFXO_FREQUENCY);
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/* Switching the CPU clock source to HFXO */
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CMU_ClockSelectSet(cmuClock_HF, cmuSelect_HFXO);
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/* Turning off the high frequency RC Oscillator (HFRCO) */
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CMU_OscillatorEnable(cmuOsc_HFRCO, false, false);
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#endif
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#if defined(EFM32_USING_LFXO)
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CMU_ClockSelectSet(cmuClock_LFA,cmuSelect_LFXO);
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CMU_ClockSelectSet(cmuClock_LFB, cmuSelect_LFXO);
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#endif
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#if defined(EFM32_SWO_ENABLE)
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/* Enable SWO */
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Swo_Configuration();
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#endif
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/* Enable high frequency peripheral clock */
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CMU_ClockEnable(cmuClock_HFPER, true);
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/* Enabling clock to the interface of the low energy modules */
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CMU_ClockEnable(cmuClock_CORELE, true);
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/* Enable GPIO clock */
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CMU_ClockEnable(cmuClock_GPIO, true);
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/* Configure the SysTick */
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SysTick_Configuration();
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}
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/***************************************************************************//**
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* @brief
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* Initialize the hardware drivers.
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*
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* @details
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*
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* @note
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*
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******************************************************************************/
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void rt_hw_driver_init(void)
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{
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/* Initialize DMA */
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rt_hw_dma_init();
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/* Select LFXO for specified module (and wait for it to stabilize) */
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#if (!defined(EFM32_USING_LFXO) && defined(RT_USING_RTC))
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#error "Low frequency clock source is needed for using RTC"
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#endif
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#if (!defined(EFM32_USING_LFXO )&& \
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(defined(RT_USING_LEUART0) || defined(RT_USING_LEUART1)))
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#error "Low frequency clock source is needed for using LEUART"
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#endif
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/* Initialize USART */
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#if (defined(RT_USING_USART0) || defined(RT_USING_USART1) || \
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defined(RT_USING_USART2) || defined(RT_USING_UART0) || \
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defined(RT_USING_UART1))
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rt_hw_usart_init();
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#endif
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/* Initialize LEUART */
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#if (defined(RT_USING_LEUART0) || defined(RT_USING_LEUART1))
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rt_hw_leuart_init();
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#endif
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/* Setup Console */
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#if defined(EFM32_GXXX_DK)
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DVK_enablePeripheral(DVK_RS232A);
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DVK_enablePeripheral(DVK_SPI);
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#elif defined(EFM32GG_DK3750)
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#if (RT_CONSOLE_DEVICE == EFM_UART1)
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DVK_enablePeripheral(DVK_RS232_UART);
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#elif (RT_CONSOLE_DEVICE == EFM_LEUART1)
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DVK_enablePeripheral(DVK_RS232_LEUART);
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#endif
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#endif
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rt_console_set_device(CONSOLE_DEVICE);
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/* Initialize Timer */
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#if (defined(RT_USING_TIMER0) || defined(RT_USING_TIMER1) || defined(RT_USING_TIMER2))
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rt_hw_timer_init();
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#endif
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/* Initialize ADC */
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#if defined(RT_USING_ADC0)
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rt_hw_adc_init();
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#endif
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/* Initialize ACMP */
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#if (defined(RT_USING_ACMP0) || defined(RT_USING_ACMP1))
|
||
|
|
rt_hw_acmp_init();
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Initialize IIC */
|
||
|
|
#if (defined(RT_USING_IIC0) || defined(RT_USING_IIC1))
|
||
|
|
rt_hw_iic_init();
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Initialize RTC */
|
||
|
|
#if defined(RT_USING_RTC)
|
||
|
|
rt_hw_rtc_init();
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Enable SPI access to MicroSD card */
|
||
|
|
#if defined(EFM32_USING_SPISD)
|
||
|
|
#if defined(EFM32_GXXX_DK)
|
||
|
|
DVK_writeRegister(BC_SPI_CFG, 1);
|
||
|
|
#elif defined(EFM32GG_DK3750)
|
||
|
|
DVK_enablePeripheral(DVK_MICROSD);
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Enable SPI access to Ethernet */
|
||
|
|
#if defined(EFM32_USING_ETHERNET)
|
||
|
|
#if defined(EFM32GG_DK3750)
|
||
|
|
DVK_enablePeripheral(DVK_ETH);
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Initialize LCD */
|
||
|
|
#if defined(EFM32_USING_LCD)
|
||
|
|
efm32_spiLcd_init();
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Initialize Keys */
|
||
|
|
#if defined(EFM32_USING_KEYS)
|
||
|
|
#if defined(EFM32GG_DK3750)
|
||
|
|
efm32_hw_keys_init();
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
/***************************************************************************//**
|
||
|
|
* @}
|
||
|
|
******************************************************************************/
|