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82 lines
2.8 KiB
82 lines
2.8 KiB
5 months ago
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-02-08 RT-Thread the first version
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* 2020-03-2 Howard Su Define same regsiters as an array
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*/
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#ifndef __INTERRUPT_H__
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#define __INTERRUPT_H__
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/* Max number of interruptions */
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#define INTERRUPTS_MAX (64)
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/* a group num */
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#define GROUP_NUM (32)
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/* Interrupt Source */
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#define NMI_INTERRUPT (0)
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#define UART0_INTERRUPT (1)
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#define UART1_INTERRUPT (2)
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#define UART2_INTERRUPT (3)
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#define OWA_INTERRUPT (5)
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#define CIR_INTERRUPT (6)
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#define TWI0_INTERRUPT (7)
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#define TWI1_INTERRUPT (8)
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#define TWI2_INTERRUPT (9)
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#define SPI0_INTERRUPT (10)
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#define SPI1_INTERRUPT (11)
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#define TIMER0_INTERRUPT (13)
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#define TIMER1_INTERRUPT (14)
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#define TIMER2_INTERRUPT (15)
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#define WATCHDOG_INTERRUPT (16)
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#define RSB_INTERRUPT (17)
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#define DMA_INTERRUPT (18)
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#define TOUCHPANEL_INTERRUPT (20)
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#define AUDIOCODEC_INTERRUPT (21)
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#define KEYADC_INTERRUPT (22)
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#define SDC0_INTERRUPT (23)
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#define SDC1_INTERRUPT (24)
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#define USB_OTG_INTERRUPT (26)
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#define TVD_INTERRUPT (27)
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#define TVE_INTERRUPT (28)
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#define TCON_INTERRUPT (29)
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#define DE_FE_INTERRUPT (30)
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#define DE_BE_INTERRUPT (31)
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#define CSI_INTERRUPT (32)
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#define DE_INTERLACER_INTERRUPT (33)
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#define VE_INTERRUPT (34)
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#define DAUDIO_INTERRUPT (35)
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#define PIOD_INTERRUPT (38)
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#define PIOE_INTERRUPT (39)
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#define PIOF_INTERRUPT (40)
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/* intc register address */
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#define INTC_BASE_ADDR (0x01C20400)
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struct tina_intc
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{
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volatile rt_uint32_t vector_reg; /* 0x00 */
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volatile rt_uint32_t base_addr_reg; /* 0x04 */
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volatile rt_uint32_t reserved0;
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volatile rt_uint32_t nmi_ctrl_reg; /* 0x0C */
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volatile rt_uint32_t pend_reg[2]; /* 0x10, 0x14 */
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volatile rt_uint32_t reserved1[2];
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volatile rt_uint32_t en_reg[2]; /* 0x20, 0x24 */
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volatile rt_uint32_t reserved2[2];
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volatile rt_uint32_t mask_reg[2]; /* 0x30, 0x34 */
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volatile rt_uint32_t reserved3[2];
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volatile rt_uint32_t resp_reg[2]; /* 0x40, 0x44 */
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volatile rt_uint32_t reserved4[2];
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volatile rt_uint32_t ff_reg[2]; /* 0x50, 0x54 */
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volatile rt_uint32_t reserved5[2];
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volatile rt_uint32_t prio_reg[4]; /* 0x60 - 0x6c */
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} ;
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typedef struct tina_intc *tina_intc_t;
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#define INTC ((tina_intc_t)INTC_BASE_ADDR)
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#endif /* __INTERRUPT_H__ */
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