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416 lines
11 KiB
416 lines
11 KiB
5 months ago
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Email: opensource_embedded@phytium.com.cn
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*
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* Change Logs:
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* Date Author Notes
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* 2023-10-23 zhangyan first version
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*
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*/
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#include "rtconfig.h"
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#include <rtdevice.h>
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#define LOG_TAG "i2c_drv"
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#include "drv_log.h"
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#include "drv_i2c.h"
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#include "fi2c.h"
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#include "fi2c_hw.h"
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#include "fio_mux.h"
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#include "fmio_hw.h"
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#include "fmio.h"
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#include "drivers/i2c.h"
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#include "fparameters.h"
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#ifdef RT_USING_SMART
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#include <ioremap.h>
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#endif
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/*Please define the length of the mem_addr of the device*/
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#ifndef FI2C_DEVICE_MEMADDR_LEN
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#define FI2C_DEVICE_MEMADDR_LEN 1
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#endif
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#define FI2C_DEFAULT_ID 0
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#define I2C_USE_MIO
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#if defined(I2C_USE_MIO)
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static FMioCtrl mio_handle;
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#endif
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struct phytium_i2c_bus
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{
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struct rt_i2c_bus_device device;
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FI2c i2c_handle;
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struct rt_i2c_msg *msg;
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const char *name;
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};
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#if defined(I2C_USE_CONTROLLER)
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static rt_err_t i2c_config(struct phytium_i2c_bus *i2c_bus)
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{
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RT_ASSERT(i2c_bus);
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FI2cConfig input_cfg;
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const FI2cConfig *config_p = NULL;
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FI2c *instance_p = &i2c_bus->i2c_handle;
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FError ret = FI2C_SUCCESS;
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/* Lookup default configs by instance id */
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config_p = FI2cLookupConfig(instance_p->config.instance_id);
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input_cfg = *config_p;
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#ifdef RT_USING_SMART
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input_cfg.base_addr = (uintptr)rt_ioremap((void *)input_cfg.base_addr, 0x1000);
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#endif
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input_cfg.speed_rate = FI2C_SPEED_STANDARD_RATE;
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input_cfg.work_mode = FI2C_MASTER;
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FI2cDeInitialize(&i2c_bus->i2c_handle);
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/* Initialization */
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ret = FI2cCfgInitialize(instance_p, &input_cfg);
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if (ret != FI2C_SUCCESS)
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{
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LOG_E("Init master I2c failed, ret: 0x%x", ret);
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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#endif
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#if defined(I2C_USE_MIO)
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static rt_err_t i2c_mio_config(struct phytium_i2c_bus *i2c_bus)
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{
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RT_ASSERT(i2c_bus);
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FI2cConfig input_cfg;
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const FI2cConfig *config_p = NULL;
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FI2c *instance_p = &i2c_bus->i2c_handle;
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FError ret = FI2C_SUCCESS;
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mio_handle.config = *FMioLookupConfig(instance_p->config.instance_id);
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#ifdef RT_USING_SMART
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mio_handle.config.func_base_addr = (uintptr)rt_ioremap((void *)mio_handle.config.func_base_addr, 0x1200);
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mio_handle.config.mio_base_addr = (uintptr)rt_ioremap((void *)mio_handle.config.mio_base_addr, 0x200);
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#endif
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ret = FMioFuncInit(&mio_handle, FMIO_FUNC_SET_I2C);
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if (ret != FT_SUCCESS)
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{
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LOG_E("MIO initialize error.");
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return -RT_ERROR;
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}
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FIOPadSetMioMux(instance_p->config.instance_id);
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config_p = FI2cLookupConfig(FI2C_DEFAULT_ID);
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if (NULL == config_p)
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{
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LOG_E("Config of mio instance %d non found.", instance_p->config.instance_id);
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return -RT_ERROR;
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}
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input_cfg = *config_p;
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input_cfg.instance_id = instance_p->config.instance_id;
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input_cfg.base_addr = FMioFuncGetAddress(&mio_handle, FMIO_FUNC_SET_I2C);
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input_cfg.irq_num = FMioFuncGetIrqNum(&mio_handle, FMIO_FUNC_SET_I2C);
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input_cfg.ref_clk_hz = FMIO_CLK_FREQ_HZ;
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input_cfg.speed_rate = FI2C_SPEED_STANDARD_RATE;
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ret = FI2cCfgInitialize(&i2c_bus->i2c_handle, &input_cfg);
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if (FI2C_SUCCESS != ret)
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{
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LOG_E("Init mio master failed, ret: 0x%x", ret);
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return -RT_ERROR;
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}
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mio_handle.is_ready = 0;
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memset(&mio_handle, 0, sizeof(mio_handle));
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return RT_EOK;
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}
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#endif
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static rt_err_t phytium_i2c_set_speed(struct phytium_i2c_bus *i2c_bus, rt_uint32_t speed)
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{
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RT_ASSERT(i2c_bus);
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u32 ret;
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uintptr base_addr = i2c_bus->i2c_handle.config.base_addr;
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ret = FI2cSetSpeed(base_addr, speed);
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if (ret != FI2C_SUCCESS)
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{
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LOG_E("Set i2c speed failed!\n");
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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static rt_err_t i2c_bus_control(struct rt_i2c_bus_device *device, int cmd, void *args)
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{
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RT_ASSERT(device);
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struct phytium_i2c_bus *i2c_bus;
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i2c_bus = (struct phytium_i2c_bus *)(device);
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FI2cConfig *config_p;
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switch (cmd)
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{
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case RT_I2C_DEV_CTRL_CLK:
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phytium_i2c_set_speed(i2c_bus, *(rt_uint32_t *)args);
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break;
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case RT_I2C_DEV_CTRL_10BIT:
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config_p = &i2c_bus->i2c_handle.config;
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config_p->use_7bit_addr = FALSE;
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FI2cCfgInitialize(&i2c_bus->i2c_handle, config_p);
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break;
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default:
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return -RT_EIO;
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}
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return RT_EOK;
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}
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static rt_ssize_t i2c_master_xfer(struct rt_i2c_bus_device *device, struct rt_i2c_msg msgs[], rt_uint32_t num)
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{
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RT_ASSERT(device);
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u32 ret;
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struct rt_i2c_msg *pmsg;
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rt_ssize_t i;
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struct phytium_i2c_bus *i2c_bus;
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i2c_bus = (struct phytium_i2c_bus *)(device);
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u32 mem_addr;
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for (i = 0; i < num; i++)
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{
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pmsg = &msgs[i];
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for (u32 j = 0; j <FI2C_DEVICE_MEMADDR_LEN; j++)
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{
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mem_addr |= msgs[i].buf[j] << (8 * (FI2C_DEVICE_MEMADDR_LEN - 1 - j));
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}
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i2c_bus->i2c_handle.config.slave_addr = pmsg->addr;
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if (pmsg->flags & RT_I2C_RD)
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{
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ret = FI2cMasterReadPoll(&i2c_bus->i2c_handle, mem_addr, FI2C_DEVICE_MEMADDR_LEN, &pmsg->buf[0], pmsg->len);
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if (ret != FI2C_SUCCESS)
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{
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LOG_E("I2C master read failed!\n");
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return -RT_ERROR;
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}
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}
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else
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{
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ret = FI2cMasterWritePoll(&i2c_bus->i2c_handle, mem_addr, FI2C_DEVICE_MEMADDR_LEN, &pmsg->buf[FI2C_DEVICE_MEMADDR_LEN], pmsg->len);
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if (ret != FI2C_SUCCESS)
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{
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LOG_E("I2C master write failed!\n");
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return -RT_ERROR;
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}
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}
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}
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return i;
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}
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static const struct rt_i2c_bus_device_ops _i2c_ops =
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{
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.master_xfer = i2c_master_xfer,
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.slave_xfer = NULL,
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.i2c_bus_control = i2c_bus_control
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};
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#if defined(I2C_USE_CONTROLLER)
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static int i2c_controller_init(struct phytium_i2c_bus *i2c_controller_bus)
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{
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rt_err_t ret = RT_EOK;
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ret = i2c_config(i2c_controller_bus);
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if (ret != RT_EOK)
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{
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LOG_E("I2C config failed.\n");
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return -RT_ERROR;
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}
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i2c_controller_bus->device.ops = &_i2c_ops;
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ret = rt_i2c_bus_device_register(&i2c_controller_bus->device, i2c_controller_bus->name);
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RT_ASSERT(RT_EOK == ret);
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LOG_D("I2C bus reg success.\n");
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return ret;
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}
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#endif
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#if defined(I2C_USE_MIO)
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static int i2c_mio_init(struct phytium_i2c_bus *i2c_mio_bus)
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{
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rt_err_t ret = RT_EOK;
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ret = i2c_mio_config(i2c_mio_bus);
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if (ret != RT_EOK)
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{
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LOG_E("I2C mio config failed.\n");
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return -RT_ERROR;
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}
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i2c_mio_bus->device.ops = &_i2c_ops;
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ret = rt_i2c_bus_device_register(&i2c_mio_bus->device, i2c_mio_bus->name);
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RT_ASSERT(RT_EOK == ret);
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LOG_D("I2C mio bus reg success.\n");
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return ret;
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}
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#endif
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#if defined(RT_USING_I2C0)
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static struct phytium_i2c_bus i2c_controller0_bus;
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#endif
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#if defined(RT_USING_I2C1)
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static struct phytium_i2c_bus i2c_controller1_bus;
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#endif
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#if defined(RT_USING_I2C2)
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static struct phytium_i2c_bus i2c_controller2_bus;
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#endif
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#if defined(RT_USING_MIO0)
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static struct phytium_i2c_bus i2c_mio0_bus;
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#endif
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#if defined(RT_USING_MIO1)
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static struct phytium_i2c_bus i2c_mio1_bus;
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#endif
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#if defined(RT_USING_MIO2)
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static struct phytium_i2c_bus i2c_mio2_bus;
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#endif
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#if defined(RT_USING_MIO3)
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static struct phytium_i2c_bus i2c_mio3_bus;
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#endif
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#if defined(RT_USING_MIO4)
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static struct phytium_i2c_bus i2c_mio4_bus;
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#endif
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#if defined(RT_USING_MIO5)
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static struct phytium_i2c_bus i2c_mio5_bus;
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#endif
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#if defined(RT_USING_MIO6)
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static struct phytium_i2c_bus i2c_mio6_bus;
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#endif
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#if defined(RT_USING_MIO7)
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static struct phytium_i2c_bus i2c_mio7_bus;
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#endif
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#if defined(RT_USING_MIO8)
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static struct phytium_i2c_bus i2c_mio8_bus;
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#endif
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#if defined(RT_USING_MIO9)
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static struct phytium_i2c_bus i2c_mio9_bus;
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#endif
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#if defined(RT_USING_MIO10)
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static struct phytium_i2c_bus i2c_mio10_bus;
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#endif
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#if defined(RT_USING_MIO11)
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static struct phytium_i2c_bus i2c_mio11_bus;
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#endif
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#if defined(RT_USING_MIO12)
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static struct phytium_i2c_bus i2c_mio12_bus;
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#endif
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#if defined(RT_USING_MIO13)
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static struct phytium_i2c_bus i2c_mio13_bus;
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#endif
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#if defined(RT_USING_MIO14)
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static struct phytium_i2c_bus i2c_mio14_bus;
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#endif
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#if defined(RT_USING_MIO15)
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static struct phytium_i2c_bus i2c_mio15_bus;
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#endif
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int rt_hw_i2c_init(void)
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{
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#if defined(RT_USING_I2C0)
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i2c_controller0_bus.name = "I2C0";
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i2c_controller0_bus.i2c_handle.config.instance_id = FI2C0_ID;
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i2c_controller_init(&i2c_controller0_bus);
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#endif
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#if defined(RT_USING_I2C1)
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i2c_controller1_bus.name = "I2C1";
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i2c_controller1_bus.i2c_handle.config.instance_id = FI2C1_ID;
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i2c_controller_init(&i2c_controller1_bus);
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#endif
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#if defined(RT_USING_I2C2)
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i2c_controller2_bus.name = "I2C2";
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i2c_controller2_bus.i2c_handle.config.instance_id = FI2C2_ID;
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i2c_controller_init(&i2c_controller2_bus);
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#endif
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#if defined(RT_USING_MIO0)
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i2c_mio0_bus.name = "MIO0";
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i2c_mio0_bus.i2c_handle.config.instance_id = FMIO0_ID;
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i2c_mio_init(&i2c_mio0_bus);
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#endif
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#if defined(RT_USING_MIO1)
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i2c_mio1_bus.name = "MIO1";
|
||
|
|
i2c_mio1_bus.i2c_handle.config.instance_id = FMIO1_ID;
|
||
|
|
i2c_mio_init(&i2c_mio1_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO2)
|
||
|
|
i2c_mio2_bus.name = "MIO2";
|
||
|
|
i2c_mio2_bus.i2c_handle.config.instance_id = FMIO2_ID;
|
||
|
|
i2c_mio_init(&i2c_mio2_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO3)
|
||
|
|
i2c_mio3_bus.name = "MIO3";
|
||
|
|
i2c_mio3_bus.i2c_handle.config.instance_id = FMIO3_ID;
|
||
|
|
i2c_mio_init(&i2c_mio3_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO4)
|
||
|
|
i2c_mio4_bus.name = "MIO4";
|
||
|
|
i2c_mio4_bus.i2c_handle.config.instance_id = FMIO4_ID;
|
||
|
|
i2c_mio_init(&i2c_mio4_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO5)
|
||
|
|
i2c_mio5_bus.name = "MIO5";
|
||
|
|
i2c_mio5_bus.i2c_handle.config.instance_id = FMIO5_ID;
|
||
|
|
i2c_mio_init(&i2c_mio5_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO6)
|
||
|
|
i2c_mio6_bus.name = "MIO6";
|
||
|
|
i2c_mio6_bus.i2c_handle.config.instance_id = FMIO6_ID;
|
||
|
|
i2c_mio_init(&i2c_mio6_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO7)
|
||
|
|
i2c_mio7_bus.name = "MIO2";
|
||
|
|
i2c_mio7_bus.i2c_handle.config.instance_id = FMIO7_ID;
|
||
|
|
i2c_mio_init(&i2c_mio7_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO8)
|
||
|
|
i2c_mio8_bus.name = "MIO8";
|
||
|
|
i2c_mio8_bus.i2c_handle.config.instance_id = FMIO8_ID;
|
||
|
|
i2c_mio_init(&i2c_mio8_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO9)
|
||
|
|
i2c_mio9_bus.name = "MIO9";
|
||
|
|
i2c_mio9_bus.i2c_handle.config.instance_id = FMIO9_ID;
|
||
|
|
i2c_mio_init(&i2c_mio9_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO10)
|
||
|
|
i2c_mio10_bus.name = "MIO10";
|
||
|
|
i2c_mio10_bus.i2c_handle.config.instance_id = FMIO10_ID;
|
||
|
|
i2c_mio_init(&i2c_mio10_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO11)
|
||
|
|
i2c_mio11_bus.name = "MIO11";
|
||
|
|
i2c_mio11_bus.i2c_handle.config.instance_id = FMIO11_ID;
|
||
|
|
i2c_mio_init(&i2c_mio11_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO12)
|
||
|
|
i2c_mio12_bus.name = "MIO12";
|
||
|
|
i2c_mio12_bus.i2c_handle.config.instance_id = FMIO12_ID;
|
||
|
|
i2c_mio_init(&i2c_mio12_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO13)
|
||
|
|
i2c_mio13_bus.name = "MIO13";
|
||
|
|
i2c_mio13_bus.i2c_handle.config.instance_id = FMIO13_ID;
|
||
|
|
i2c_mio_init(&i2c_mio13_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO14)
|
||
|
|
i2c_mio14_bus.name = "MIO14";
|
||
|
|
i2c_mio14_bus.i2c_handle.config.instance_id = FMIO14_ID;
|
||
|
|
i2c_mio_init(&i2c_mio14_bus);
|
||
|
|
#endif
|
||
|
|
#if defined(RT_USING_MIO15)
|
||
|
|
i2c_mio15_bus.name = "MIO15";
|
||
|
|
i2c_mio15_bus.i2c_handle.config.instance_id = FMIO15_ID;
|
||
|
|
i2c_mio_init(&i2c_mio15_bus);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
INIT_DEVICE_EXPORT(rt_hw_i2c_init);
|