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284 lines
8.2 KiB
284 lines
8.2 KiB
5 months ago
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2010-03-08 Bernard The first version for LPC17xx
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* 2010-04-10 fify Modified for M16C
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "iom16c62p.h"
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#include "bsp.h"
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#include "uart.h"
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#if defined(RT_USING_UART0) && defined(RT_USING_DEVICE)
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struct rt_uart_m16c
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{
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struct rt_device parent;
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/* buffer for reception */
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rt_uint8_t read_index, save_index;
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rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
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}uart_device;
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void u0rec_handler(void)
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{
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rt_ubase_t level;
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rt_uint8_t c;
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struct rt_uart_m16c *uart = &uart_device;
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while (U0C1.BIT.RI == 0)
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;
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c = U0RB.BYTE.U0RBL;
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/* Receive Data Available */
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uart->rx_buffer[uart->save_index] = c;
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level = rt_hw_interrupt_disable();
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uart->save_index ++;
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if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
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uart->save_index = 0;
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rt_hw_interrupt_enable(level);
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/* invoke callback */
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if (uart->parent.rx_indicate != RT_NULL)
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{
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rt_size_t length;
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if (uart->read_index > uart->save_index)
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length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
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else
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length = uart->save_index - uart->read_index;
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uart->parent.rx_indicate(&uart->parent, length);
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}
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}
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static rt_err_t rt_uart_init (rt_device_t dev)
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{
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rt_uint32_t level;
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/* set UART0 bit rate generator bit rate can be calculated by:
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bit rate = ((BRG count source / 16)/baud rate) - 1
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Baud rate is based on main crystal or PLL not CPU core clock */
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//pclk1 = 1; /// seleck F1SIO
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U0BRG = (unsigned char)(((CPU_CLK_FREQ/16)/BAUD_RATE)-1); //(N+1)
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/* UART Transmit/Receive Control Register 2 */
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UCON.BYTE = 0x00;
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/* 00000000
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b0 U0IRS UART0 transmit irq cause select bit, 0 = transmit buffer empty
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b1 U1IRS UART1 transmit irq cause select bit, 0 = transmit buffer empty
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b2 U0RRM UART0 continuous receive mode enable bit, set to 0 in UART mode
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b3 U1RRM UART1 continuous receive mode enable bit, set to 0 in UART mode
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b4 CLKMD0 CLK/CLKS select bit 0, set to 0 in UART mode
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b5 CLKMD1 CLK/CLKS select bit 1, set to 0 in UART mode
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b6 RCSP Separate CTS/RTS bit,
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b7 Reserved, set to 0 */
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/* UART0 transmit/receive control register 0 */
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/* f1 count source, CTS/RTS disabled, CMOS output */
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U0C0.BYTE = 0x10;
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/* 00010000
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b1:b0 CLK01:CLK0 BRG count source select bits //01 F8SIO
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b2 CRS CTS/RTS function select bit
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b3 TXEPT Transmit register empty flag
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b4 CRD CTS/RTS disable bit
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b5 NCH Data output select bit
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b6 CKPOL CLK polarity select bit,set to 0 in UART mode
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b7 UFORM Transfer format select bit,set to 0 in UART mode */
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/* UART0 transmit/receive control register 1 */
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/* disable transmit and receive, no error output pin, data not inverted */
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U0C1.BYTE = 0x00;
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/* 00000000
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b0 TE Transmit enable bit
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b1 TI Transmit buffer empty flag
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b2 RE Receive enable bit
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b3 RI Receive complete flag
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b5:b4 Reserved, set to 0
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b6 UOLCH Data logic select bit
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b7 UOERE Error signal output enable bit */
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/* UART0 transmit/receive mode register */
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/* 8-bit data,asynch mode, internal clock, 1 stop bit, no parity */
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U0MR.BYTE = 0x05;
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/* 00000101
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b2:b0 SMD12:SMD1 Serial I/O Mode select bits
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b3 CKDIR Internal/External clock select bit, CKDIR
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b4 STPS Stop bit length select bit, STPS
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b5 PRY Odd/even parity select bit, PRY
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b6 PRYE Parity enable bit, PRYE
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b7 IOPOL TxD, RxD I/O polarity reverse bit */
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/* clear UART0 receive buffer by reading */
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U0TB.WORD = U0RB.WORD;
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/* clear UART0 transmit buffer */
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U0TB.WORD = 0;
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/* disable irqs before setting irq registers */
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level = rt_hw_interrupt_disable();
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/* Enable UART0 receive interrupt, priority level 4 */
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S0RIC.BYTE = 0x04;
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/* Enable all interrupts */
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rt_hw_interrupt_enable(level);
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/* UART0 transmit/receive control register 1 */
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/* enable transmit and receive */
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U0C1.BYTE = 0x05;
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/* 00000101 enable transmit and receive
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b0 TE Transmit enable bit
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b1 TI Transmit buffer empty flag
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b2 RE Receive enable bit
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b3 RI Receive complete flag
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b5:b4 Reserved, set to 0
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b6 UOLCH Data logic select bit
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b7 UOERE Error signal output enable bit */
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return RT_EOK;
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}
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static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
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{
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RT_ASSERT(dev != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* Enable the UART Interrupt */
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}
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return RT_EOK;
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}
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static rt_err_t rt_uart_close(rt_device_t dev)
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{
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RT_ASSERT(dev != RT_NULL);
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* Disable the UART Interrupt */
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}
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return RT_EOK;
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}
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static rt_ssize_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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rt_uint8_t *ptr;
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struct rt_uart_m16c *uart = (struct rt_uart_m16c *)dev;
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RT_ASSERT(uart != RT_NULL);
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/* point to buffer */
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ptr = (rt_uint8_t *)buffer;
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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while (size)
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{
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/* interrupt receive */
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rt_base_t level;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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if (uart->read_index != uart->save_index)
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{
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*ptr = uart->rx_buffer[uart->read_index];
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uart->read_index ++;
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if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
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uart->read_index = 0;
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}
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else
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{
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/* no data in rx buffer */
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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break;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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ptr ++;
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size --;
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}
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return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
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}
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return 0;
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}
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static rt_ssize_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
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{
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char *ptr;
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ptr = (char *)buffer;
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if (dev->flag & RT_DEVICE_FLAG_STREAM)
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{
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/* stream mode */
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while (size)
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{
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if (*ptr == '\n')
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{
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while (U0C1.BIT.TI == 0)
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;
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U0TB.BYTE.U0TBL = '\r';
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}
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/* THRE status, contain valid data */
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while (U0C1.BIT.TI == 0)
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;
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U0TB.BYTE.U0TBL = *ptr;
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ptr ++;
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size --;
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}
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}
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else
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{
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while (size != 0)
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{
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/* THRE status, contain valid data */
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while (U0C1.BIT.TI == 0)
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;
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U0TB.BYTE.U0TBL = *ptr;
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ptr ++;
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size --;
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}
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}
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return (rt_size_t)ptr - (rt_size_t)buffer;
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}
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void rt_hw_uart_init(void)
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{
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struct rt_uart_m16c *uart;
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/* get uart device */
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uart = &uart_device;
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/* device initialization */
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uart->parent.type = RT_Device_Class_Char;
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rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
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uart->read_index = uart->save_index = 0;
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/* device interface */
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uart->parent.init = rt_uart_init;
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uart->parent.open = rt_uart_open;
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uart->parent.close = rt_uart_close;
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uart->parent.read = rt_uart_read;
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uart->parent.write = rt_uart_write;
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uart->parent.control = RT_NULL;
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uart->parent.user_data = RT_NULL;
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rt_device_register(&uart->parent,
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"uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX);
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}
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#endif /* end of UART */
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/*@}*/
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